As a senior individual contributor in System and Technology Product Group (STPG), you will provide technical leadership across the full learning loop of a test chip vehicle (TCV) - shaping pre-silicon simulation and regression strategy before tape-out, driving silicon debug after bring-up, and converting data into durable design, model, and methodology improvements for next-generation NAND flash memory products. This role is expected to independently identify risk, define solutions, and influence cross-functional technical direction.
Key Responsibilities
Pre-Silicon Simulation, Coverage & Regression Ownership
Own pre-silicon‑ validation strategy for TCV, partnering with Design, Process, and TD to define what must be proven in simulation versus silicon.
Develop, maintain, and execute robust simulation and regression frameworks (functional, parametric, stress, and corner) aligned to TCV objectives.
Define coverage expectations and exit criteria for pre-silicon regressions, identifying‑ gaps and latent risks early.
Analyze simulation results to surface architecture, device, and margin sensitivities, driving design updates and tape‑out readiness decisions.
Establish and enforce simulation ↔ silicon correlation methodology to ensure modeling fidelity and learning continuity.
TCV Definition, Bring-Up & Silicon Validation
Provide technical ownership for TCV bring-up from first silicon through full characterization readiness.
Define probe enablement, trims, operating conditions, and debug strategies to accelerate stable and informative silicon access.
Lead execution of electrical characterization plans validating array, periphery and experimental features against design and process intent.
Drive deep root cause analysis for silicon anomalies, distinguishing design, process, model, or test limitations.
Test Content & Methodology Leadership
Architect TCV specific test modes, patterns, and flows to maximize learning efficiency and data quality.
Partner with Test Solutions Engineering (TSE) to influence probe architecture and infrastructure supporting TCV for protocol evolution.
Define voltage, timing, and temperature stress strategies to expose true design and process limits beyond nominal behavior.
Cross-Functional Technical Leadership & Influence
Serve as a go-to technical expert across Design, TD, Process and Test for TCV and early silicon topics.
Translate simulation and silicon findings into clear, actionable recommendations that influence design fixes, model updates, and next generation architectures.
Lead complex debug efforts with ambiguous data, setting technical direction by crystalizing multifaceted information.
Role-model technical leadership through active mentoring and talent development to support Micron’s long-term success.
Data Analysis, Correlation & Knowledge Capture
Spearhead AI adoption to perform advanced data analytics across large simulation and silicon datasets.
Author high-impact technical documentation capturing learnings, best practices, and reusable methodologies for STPG and broader org consumption.
Requirements:
Bachelor’s or post-graduate degree in Electrical/ Electronics/ Computer Engineering or related field, with minimum 5 years of relevant industrial experience.
Strong fundamentals in CMOS/ MOSFET device physics, memory circuits, and semiconductor devices.
Demonstrated experience owning pre-silicon simulation/regression and post-silicon test/ validation for complex designs.
Strong capability in data analysis and scripting (Python, JMP, or equivalent) applied to large datasets.
Proven ability to drive ambiguous technical problems to closure with minimal supervision.
Deep experience with NAND Flash architectures, array/periphery interactions, and test chips is preferred.
Working knowledge of DFT, probe test infrastructure, and failure analysis.
Experience with firmware-assisted‑ test modes and experimental silicon features.
Exposure to automation, ML/AI, or advanced analytics applied to simulation and silicon learning loops.
Candidates may be considered for higher job grades if they exceed 10 years of relevant experience.
