Total 159 process development engineer job vacancies in Bengaluru

LinkedIn Marketing Solutions (LMS) helps B2B brands reach, engage, and convert professional audiences on a safe, trusted platform. The Ads Trust Engineering charter builds scalable AI systems that improve Ads auto-review, traffic quality, brand safety/suitability/viewability, and transparency for members and advertisers, while enabling partner-led growth.

As a Staff AI Engineer, you will lead end-to-end ML systems and AI defenses that protect members and maximize advertiser ROI across LinkedIn Marketing Solutions. You’ll own architecture and delivery from data pipelines to low-latency inference, partner across product/infra/DS to set technical direction, and raise the bar on engineering craftsmanship and operational excellence.

At LinkedIn, our approach to flexible work is centered on trust and optimized for culture, connection, clarity, and the evolving needs of our business. The work location of this role is hybrid, meaning it will be performed both from home and from a LinkedIn office on select days, as determined by the business needs of the team.

Responsibilities:
- Design, build, and scale ML platforms and models for ads relevance, brand safety/suitability/viewability, and invalid traffic (IVT) / fraud detection in both pre-bid and post-bid workflows.
- Own real-time scoring and streaming pipelines with strict SLA/latency requirements; drive robust feature engineering, model serving, monitoring, and auto-remediation.
- Apply and productionize LLM/GenAI techniques (e.g., topicality classification, policy defenses, safety prompts) with measurable precision/recall improvements.
- Lead experiment design (A/B, backfills, offline/online eval), build high-signal metrics and dashboards, and partner with the data science team to quantify impact.
- Drive system design for reliability and scale (caching strategies, partitioning, queue management, backpressure control, failover).
- Collaborate with product, policy, and legal on trust/transparency and compliance requirements; influence design for customer-facing transparency (e.g., “Why am I seeing this ad?”).
- Mentor engineers; establish best practices for testing, code quality, observability, capacity planning, and safe ramps.
- Champion agentic/AI-native development to improve engineering velocity (tests, PR reviews, CI/CD automation) and reduce operational toil.

Job Responsibilities: 

• Layout high performance Analog and Mixed Signal circuits using the latest Cadence Design Suite  

• Perform IP level layout tasks including device placement, routing, matching techniques, shielding, guard rings, and parasitic-aware layout practices.  

• Work at multiple levels of hierarchy, from macro level (block level) to Top-level (ESD/Pad frame) 

• Verify connectivity and design rules with Assura, Calibre, PVS 

• Use QRC extraction to analyze and reduce noisy/sensitive coupling 

• Use third party tools to analyze IR drops and p2p resistance 

• Liaise closely with analog designers on specific circuit requirements, e.g. power, matching, sensitivity, latch-up, ESD, etc. 

• Work with CAD and CAE engineers to improve processes or features 

As part of our world-class software engineering team, you will be charged with building the next-generation information retrieval infrastructure and platforms for LinkedIn, including but not limited to: search systems, vector databases, system infrastructure, and other AI platform components. You will drive the technology vision and create business impact by putting to use your passion for very large scale information retrieval systems and software as a service and your passion for writing code that performs at an extreme scale. LinkedIn has already pioneered well-known open-source infrastructure projects like Apache Kafka, Pinot, Azkaban, Samza, Venice, Datahub, Feather, etc. We also work with industry standard open source infrastructure products like Kubernetes, GRPC and GraphQL - come join our infrastructure teams and share the knowledge with a broader community while making a real impact within our company.

At LinkedIn, we trust each other to do our best work where it works best for us and our teams. This role offers a hybrid work option, meaning you can both work from home and commute to a LinkedIn office, depending on what's best for you and when it is important for your team to be together.

Responsibilities

• You will build and ship software, drive architectural decisions and implementation across the BigData ecosystem that includes compute engines, processing pipelines, storage, observability, compliance.etc.
• You will design the right interfaces/APIs for long term evolution of the services.
• You will be responsible for the high availability, reliability, scalability and performance of these systems
• You will invest in growing junior engineers with a high craft bar.
• You will actively improve the level of craftsmanship at LinkedIn by developing best practices and defining best strategies.
• You will lead cross team/cross functional discussions and drive alignment on product/technology strategy. You will work closely with other stakeholders to drive intra-team alignment.
• You will be a primary domain expert to influence technology choices.

As part of our world-class software engineering team, you will be charged with building the next-generation infrastructure and platforms for LinkedIn, including but not limited to: an application and service delivery platform, massively scalable data storage and replication systems, cutting-edge search platform, best-in-class AI platform, experimentation platform, privacy and compliance platform etc. You will drive the technology vision and create business impact by putting to use your passion for very large-scale distributed systems and software as services and your passion for writing code that performs at an extreme scale. LinkedIn has already pioneered well-known open-source infrastructure projects like Apache Kafka, Pinot, Azkaban, Samza, Venice, Datahub, Feather, etc. We also work with industry standard open-source infrastructure products like Kubernetes, GRPC and GraphQL - come join our infrastructure teams and share the knowledge with a broader community while making a real impact within our company.

This role will be based in Bangalore, India. At LinkedIn, our approach to flexible work is centered on trust and optimized for culture, connection, clarity, and the evolving needs of our business. The work location of this role is hybrid, meaning it will be performed both from home and from a LinkedIn office on select days, as determined by the business needs of the team.

Responsibilities

• You will build and ship software, drive architectural decisions and implementation across the BigData ecosystem that includes data processing pipelines, pubsub systems, observability, compliance, etc.
• You will design the right interfaces/APIs for long term evolution of the services.
• You will be responsible for the high availability, reliability, scalability and performance of these systems
• You will actively improve the level of craftsmanship at LinkedIn by developing best practices and defining best strategies.
• You will invest in growing junior engineers, developing design and craftsmanship skills and culture.
• You will lead cross team/cross functional discussions and drive alignment on product/technology strategy. You will work closely with other stakeholders in HeadQuarters to drive intra-team alignment.
• You will be a primary domain expert to influence technology choices.

We are looking for a Senior Staff Machine Learning Engineer to play a pivotal role as a technical leader within the AI team. This role goes beyond building models - you will set the technical direction, own the AI roadmap, and lead initiatives that push the boundaries of what's possible in enterprise AI. You will combine deep research expertise with the ability to build production-grade ML systems at scale, partnering across engineering, product, and research to deliver transformative AI solutions.

At LinkedIn, our approach to flexible work is centered on trust and optimized for culture, connection, clarity, and the evolving needs of our business. The work location of this role is hybrid, meaning it will be performed both from home and from a LinkedIn office on select days, as determined by the business needs of the team.

Responsibilities

• Lead the design, development, and deployment of large-scale machine learning systems across areas such as ranking, recommendation systems, personalization, generative AI, reinforcement learning, and large language models.
• Define and drive the technical roadmap and architecture for end-to-end AI systems, ensuring scalability, performance, reliability, and maintainability.
• Research, fine-tune, and adapt large language models (LLMs) and build and productionize advanced AI solutions, including foundation models and agentic systems, capable of reasoning, decision-making, and contextual intelligence.
• Drive best practices in experimentation, model evaluation, fairness, explainability, and system robustness.
• Partner with product, design, and other engineering teams to align AI solutions with business strategy and maximize impact.
• Drive cross-functional collaborations with horizontal AI and platform teams to leverage foundational tools and scale adoption of innovations across LinkedIn.
• Mentor and guide engineers, fostering a culture of craftsmanship, innovation, and technical excellence.
• Represent LinkedIn in external venues (papers, conferences, workshops) by showcasing advances in applied AI research and engineering.

LinkedIn Marketing Solutions (LMS) is a leader in B2B digital advertising, helping companies deliver the right message, to the right audience, on a safe and trusted platform. Through our suite of innovative advertising solutions, we provide customers high reach and ROI. 

Ads Trust Engineering team within LMS is responsible for creating a safe and trusted ads platform for members, advertisers and partners to get the best return on investment towards the ad revenue spend objectives on Linkedin. This team provides scalable solutions using AI models towards accurate and faster review SLAs, improving Ads traffic quality as well as build best in the industry brand safety, suitability and viewability solutions. This team is also responsible for building and scaling solutions and experiences with 3rd party partners for LinkedIn through developer platform APIs.

As a Principal Staff Software Engineer, you will be a key technical leader and role model within the team. We are looking for someone who designs and develops technology to serve business and technology objectives, aligns points of view across teams and makes smart trade offs to help achieve the goals of individual teams as well as LinkedIn’s broader goals. This leader will foster LinkedIn’s culture and values around transformation, collaboration and results.

At LinkedIn, our approach to flexible work is centered on trust and optimized for culture, connection, clarity, and the evolving needs of our business. The work location of this role is hybrid, meaning it will be performed both from home and from a LinkedIn office on select days, as determined by the business needs of the team. 

Responsibilities: 

• You will build and ship software, drive architectural decisions and implementation across LMS teams.

• You will drive the adoption of cutting-edge solutions and methods to enable innovative marketing solutions products.

• You will actively improve the level of craftsmanship at LinkedIn by developing best practices and defining best strategies.

• You will lead cross team/cross-functional discussions and drive alignment on product/technology strategy.

• You will define the bar for quality and efficiency of software systems while balancing business impact, operational impact and cost benefits of design and architectural choices.

• You will act as one of the primary domain experts to influence technology choices.

• You will lead by example to build a culture of craftsmanship and innovation.

• You will be a role model and professional coach for engineers with a strong bias for action.

LinkedIn Marketing Solutions (LMS) helps B2B brands reach, engage, and convert professional audiences on a safe, trusted platform. The Ads Trust Engineering charter builds scalable AI systems that improve Ads auto-review, traffic quality, brand safety/suitability/viewability, and transparency for members and advertisers, while enabling partner-led growth.

At LinkedIn, our approach to flexible work is centered on trust and optimized for culture, connection, clarity, and the evolving needs of our business. The work location of this role is hybrid, meaning it will be performed both from home and from a LinkedIn office on select days, as determined by the business needs of the team.

Role Overview

As a Staff AI Engineer, you will lead end-to-end ML systems and AI defenses that protect members and maximize advertiser ROI across LinkedIn Marketing Solutions. You’ll own architecture and delivery from data pipelines to low-latency inference, partner across product/infra/DS to set technical direction, and raise the bar on engineering craftsmanship and operational excellence.

Responsibilities

• Design, build, and scale ML platforms and models for ads relevance, brand safety/suitability/viewability, and invalid traffic (IVT) / fraud detection in both pre-bid and post-bid workflows.

• Own real-time scoring and streaming pipelines with strict SLA/latency requirements; drive robust feature engineering, model serving, monitoring, and auto-remediation.

• Apply and productionize LLM/GenAI techniques (e.g., topicality classification, policy defenses, safety prompts) with measurable precision/recall improvements.

• Lead experiment design (A/B, backfills, offline/online evaluation), build high-signal metrics and dashboards, and partner with the data science team to quantify impact.

• Drive system design for reliability and scale (caching strategies, partitioning, queue management, backpressure control, failover).

• Collaborate with product, policy, and legal on trust/transparency and compliance requirements; influence design for customer-facing transparency (e.g., “Why am I seeing this ad?”).

• Mentor engineers; establish best practices for testing, code quality, observability, capacity planning, and safe ramps.

• Champion agentic/AI-native development to improve engineering velocity (tests, PR reviews, CI/CD automation) and reduce operational toil.

This role will be based in Bengaluru, India.

At LinkedIn, our approach to flexible work is centered on trust and optimized for culture, connection, clarity, and the evolving needs of our business. The work location of this role is hybrid, meaning it will be performed both from home and from a LinkedIn office on select days, as determined by the business needs of the team.

Key Responsibilities:

• You will build and ship software, drive architectural decisions and implementation across distributed applications, make architectural trade-offs applying synchronous and asynchronous design patterns, write code, and deliver with speediness and quality.
• Develop multi-tier scalable, high-volume performing, and reliable user-centric applications that operate 24x7.
• Produce high quality software that is unit tested, code reviewed, and checked in regularly for continuous integration.
• You will actively improve the level of craftsmanship at LinkedIn by developing best practices and defining best strategies.
• You will lead cross team/cross-functional discussions and drive alignment on product/technology strategy.
• You will define the bar for quality and efficiency of software systems while balancing business impact, operational impact and cost benefits of design and architectural choices.
• You will act as one of the primary domain experts to influence technology choices.
• You will lead by example to build a culture of craftsmanship and innovation.

We build and run an occupancy sensing platform that gets deployed inside enterprise client environments. That means our software lives on someone else's network — inside their VLANs, behind their firewalls, talking to their wireless controllers and switches.

When something breaks, the problem could be anywhere: the network config, the 802.1X authentication, the containerised services, the database, or our own code. The job is to figure out which layer it's in, fix what you can, and involve engineering when it needs to go deeper.

The honest version: you don't need to be a deep expert coming in. The previous person in this role built their specialisation on the job. What you do need is a solid enough foundation in networking and Linux that you can get up to speed quickly and work through unfamiliar problems without getting stuck.

• Team - Occupancy & IoT Platform — Client Delivery
• Location - Remote
• Start - As soon as possible
• Environment - Enterprise networks, Cisco infrastructure, Linux / Docker / Kubernetes

What You'll Be Doing :

• Troubleshooting connectivity issues between our sensors and backend systems — this means reading routing tables, checking ARP and CAM tables, and tracing packets across VLANs
• Working with client IT teams on 802.1X authentication setups — certificates, Cisco ISE policy, RADIUS flows, and why a device isn't getting onto the network it should be
• Investigating WLAN issues — access point associations, SSID configuration, wireless LAN controller settings, and RSSI or connectivity problems affecting sensor communication
• Pulling and interpreting SNMP data from managed switches and wireless controllers to diagnose device and network health
• Debugging infrastructure issues on the platform side — inspecting container logs, checking service health in Docker and Kubernetes, running database queries to understand what the data is telling you
• Remote access and diagnosis via SSH — a lot of the operational work happens this way
• Writing up what you find and building runbooks so the next issue like this takes less time to resolve

Networking — What We're Looking For

You should be able to work through network problems without needing someone to explain the basics to you. Specifically:

• IP addressing and subnetting — you can read a CIDR block, work out what's in and out of a subnet, and understand why a /24 and a /16 behave differently. Private ranges (10.x, 172.16.x, 192.168.x) should be second nature
• Routing — you can read a routing table, understand what 'via' and 'link' entries mean, and reason through why a packet is or isn't getting where it needs to go
• Switching — you understand how CAM tables work, what a VLAN is and why they exist, and how trunk ports carry tagged traffic between switches
• ARP — you know the relationship between IP and MAC addressing and can use the ARP table to diagnose link-local connectivity issues
• 802.1X — you've dealt with certificate-based network authentication in an enterprise context. You understand the EAP flow well enough to figure out where an authentication is failing
• Cisco ISE — familiarity with how ISE handles 802.1X policy is a plus, even if you haven't configured it yourself
• WLAN — access points, wireless LAN controllers, SSIDs, client association. You know the difference between an AP and a WLC and understand how a wireless client gets authenticated and onto the network
• SNMP — you know what OIDs and MIBs are, you've actually queried a managed device with SNMP, and you can interpret what you get back. SNMPv2 community strings and SNMPv3 certificate auth are both relevant here
• Cisco CMX / MSE — not required, but if you've worked with location services based on RSSI or TDOA data, that's directly useful

Systems & Infrastructure — What We're Looking For

The platform runs on Linux, in containers. A lot of debugging happens at this layer:

• Linux command line — you're comfortable in a shell. File navigation, process inspection, network tools (ping, traceroute, netstat, curl, dig), log tailing — all of this should feel normal, not effortful
• SSH — remote access is the default mode for most operational work
• Docker and docker-compose — you understand what a container is, how services are defined and networked in a compose file, and how to inspect a running container or read its logs
• Kubernetes — you don't need to build clusters, but you should understand pods, services, and deployments at an operational level and know how to use kubectl to check what's happening
• Python scripts — you're not a developer, but you can run a script, read what it does, and debug a basic error without it being a whole thing
• SQL — intermediate level. You'll write queries to investigate what the platform data is showing, check whether records exist, and cross-reference things across tables
• Log inspection — you know how to find a signal in a wall of output and work backwards from an error to its cause

Useful, Not Required

• Hands-on Cisco WLC or Prime Infrastructure experience — configuring or managing wireless controllers in a multi-AP environment
• Cisco ISE administration — building or modifying 802.1X policies, not just understanding how they work
• Experience with network monitoring tools and interpreting SNMP traps or polls at scale
• Any exposure to occupancy sensing, indoor positioning, or IoT device management

The candidate to have a passion for complex processor architecture, digital design, and verification in general. The candidate should be team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. The candidate should have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:
 

• - EMIR closure at Tile /Partition/Subsytem/SOC level on a particular node
• Ownership of EMIR Flow & Signoff
• Drive EMIR closure for design blocks and full-chip integration.
• Align EMIR analysis phases with PD milestones (INIT, PREFINAL, FINAL).
• Ensure compliance with signoff limits provided by SIPI team for given technology node
• Ability to analyze EMIR violations and propose implementation choices.
• Familiarity with DFx and scan architecture for EMIR considerations.
• Technical Leadership

• Define EMIR signoff strategy, including IR drop and electromigration analysis.
• Review floorplan, clocking, and bus structures for IR hotspots.
• Coordinate bump allocation and power rail alignment with integration teams.
• Collaboration & Coordination
  • Work closely with block owners, PD team, and integration team to execute EMIR runs.
  • Conduct EMIR run reviews and debug sessions with stakeholders.
  • Methodology & Flow Development
    • Maintain and improve EMIR flow

    • Engage with SIPI team for current profile analysis and CPA/CPM models

PREFERRED EXPERIENCE:
 

• Minimum 13+  years of relevant work experience.
• Expertise in Synthesis , ICC2/ FC (Fusion Compiler) Physical Design flows/methodologies or equivalent tools.
• Expertise in Signoff tools like Ansys Redhawk/RHSC on EMIR, PT-PX for Power signoff and Primetime for Timing
• Should have worked as a go to person or technical lead for at least few full chip projects.
• Strong technical leadership and ability to mentor/guide/coach design engineers to achieve and deliver project goals.
• Strong inter-personal skills and ability to collaborate with teams spread across multiple geos.
• Should have good scripting experience in Shell, Python, Perl, TCL, UNIX along with decode/debug old existing scripts.
• Must be using AI technologies in day to day problem solving

Are you passionate about conceptualizing, nurturing, developing, and proving new ideas and developing them into new solutions? Would you like to help create the next major innovation in and around the payment landscape pioneering and leveraging the most advanced devices, hardware and software in the world, anything, and everything in and around world’s largest payment ecosystem?

We’re looking for a seasoned individual to drive game-changing innovation in and around Visa’s partner eco-system for Asia Pacific, and specifically India. You should have experience technically leading and mentoring small multi-skilled squads of 3-4 engineers capable of rapid prototyping of new ideas as well as scale these to commercial solutions. You will be at the forefront of strategic partnerships, breakthrough technologies, new ideas, hackathons, demos, and rapid prototyping. You will work closely with business development teams, partners, and internal product teams and cross- leverage engineering talent internally and externally.

Responsibilities

·       Be at the heart of developing new ideas into demo-able products, and ultimately to commercial product.

·       Work alongside and collaborate with UX, engineering, and partner teams to deliver products, features, services, and tools.

·       Drive rapid prototyping cycles from technical requirements, software designs, programming, debugging, and optimization.

·       Explore and innovate new technologies, features, and tools.

·       Consult on a regular basis with leadership to align expectations and deliverables.

·       Be scrappy and work with the small team to the fullest to work on multiple parallel POCs and incubation efforts.

·       Able to scale the successful pilots to full commercial solutions.

·       Use stubs as needed to simulate capabilities lighting up soon.

·       Work collaboratively across team boundaries to share common infrastructure and functional capabilities. Provide feedback into core product teams to influence their roadmap and strategy

This is a hybrid position. Expectation of days in office will be confirmed by your hiring manager.

Lead Developer for Android HAL and middleware for Automotive SoCs. 

You will develop highly optimized software for Renesas R-Car Gen5 series devices. Strong working knowledge of Android and RTOS environment for multi-core heterogenous SoCs is a key requirement. You will implement requirements for the next-generation IVI/ADAS products that comprise tools, software, and hardware. Your main responsibilities will be in the following areas: 

Relevant working experience 

• RCAR Gen5 Android (AAOS/GKI) HAL & Middleware ownership—from bring-up to certification 

• Drive AAOS enablement on R-Car Gen5 variants and align to the platform Android roadmap (A16/A17…)  

• Ensure compatibility readiness (xTS/CTS/VTS) and support pre-cert / validation flows as part of BSP deliverables 

• Deliver production-grade components for SDK releases (docs, changelogs, release notes, packaging expectations)  

• Android HAL expertise (AIDL/HIDL) for automotive peripherals & SoC IP 

• Implement/extend HALs for display, audio, camera, sensors, power/thermal, boot-time optimizations, and device-specific features 

• Integrate vendor drivers and expose stable interfaces to Framework/AAOS (permissions, SELinux, init/ueventd, VINTF manifests) 

• Debug across layers (kernel↔driver↔HAL↔framework) using traces/logs (systrace/perfetto, logcat, ftrace) and root-cause systematically 

• Middleware & Framework integration for IVI/cockpit stacks 

• Build/maintain native services (binderized daemons), framework extensions, and vendor middleware to meet automotive UX/perf needs 

• Support long-term maintenance strategy (major upgrades + security/maintenance releases) with clean branching and backport discipline  

• Collaborate with partner stacks and “standard framework” integration expected in the Gen5 software model (BSP↔middleware↔apps)  

• Virtualization-ready design (Xen / multi-domain) and performance isolation 

• Enable Android as native or guest (Xen-based) with VirtIO-style device exposure where applicable; debug GVM boundaries  

• Address multi-domain constraints (timing, memory, I/O partitioning), and support fast-boot/boot KPI topics relevant to Gen5 programs  

• Work with security/TEE/boot-chain expectations typical of Gen5 platform packaging and delivery model  

• Quality, compliance, and delivery mindset (automotive-grade) 

• Own CI-friendly implementation: build reproducibility, automated tests, and regression triage across Android releases  

• Drive certification readiness: CTS/VTS execution, bug fixing, and evidence capture aligned to GAS/compatibility commitments  

• Communicate crisply with global stakeholders, document decisions, and support customer issue analysis and releases 

ESSENTIAL DUTIES AND RESPONSIBILITIES:

• Using sound test engineering principles, knowledge of the product and technology to ensure the product meets functional and customer requirements and is ready to ship on schedule
• Owns product validation regarding test plan definition, test plan execution, and primary lead in failure analysis
• Primary lead in performing performance characterization of product and tracking down any observed anomalies
• Contributes to overall test schedule development
• Writes the test plans for new product features, generates test matrices, test reports, and other relevant test documentation that is required for flawless program execution
• Defines new tests based on customer feedback and defect fixes
• Executes existing/regression test cases for the project during the entire product development cycle
• Works closely with the other system test, hardware, ASIC and firmware engineers to improve test methodology and develop new tests and new strategies
• Configures customer hardware and software systems; troubleshoot problems to get to root cause
• Maintains customer and test equipment to current revision

We are looking for technically sound and highly skilled Analog/High Speed DDR IO Layout designer with 8-12 years of experience. The ideal candidate should have a strong background in analog/IO design principles, hands-on experience with layout tools, and a passion for solving challenging technical problems.

Key Responsibilities:

• Develop and optimize MSIP IC layouts in TSMC 3nm, ensuring high performance and manufacturability.
• Collaborate with design engineers to understand design requirements and translate them into precise layouts.
• Strong experience in debugging DRC, ERC, LVS, EMIR and PERC issues independently.
• Work closely with the physical design team to integrate custom blocks into the overall chip design.
• Identify and resolve layout-related issues, providing creative solutions to meet design specifications.
• Conduct design reviews and provide technical feedback to improve layout practices and methodologies.
• Stay up-to-date with industry trends, tools, and technologies to continuously enhance layout processes
• Any prior AI knowledge/experience which can improve Layout development effort and QoR is a big plus

Qualifications

• 8-12 years of experience in Analog/High Speed DDR IO IC layout design.
• Proficiency in layout tools such as Cadence, Synopsys, or Mentor Graphics.
• Hands-on experience with custom layout design for Analog and IO circuits is required, including expertise in Bandgap references, LDOs, Clocking circuits, GPIOs, High speed DDR IOs.
• Familiarity with custom digital layout (i.e. high speed logic paths).
• Knowledge of signal integrity issues (i.e. clock/data routes, differential routing, shielding).
• Strong understanding of analog/IO design principles, including circuit performance and parasitic effects.
• Aware of layout techniques to mitigate ESD, latch-up issues.
• Holds advanced knowledge of CMOS and FinFET technologies and their impact on design and performance issues in deep sub-micron process nodes, specifically 5nm and below.
• Experience with layout concepts that incorporate reliability considerations, including techniques for managing electromigration (EM), IR drop, and self-heating.
• Experience with layout optimization for power, performance, and area (PPA) metrics.
• Excellent problem-solving skills and attention to detail.
• Effective communication and teamwork abilities.

Preferred Skills:

• Knowledge of scripting languages (e.g., Skill,TCL and SVRF) for automation tasks.

Key Responsibilities

• Lead, mentor and deliver technical contributions for designing advanced high bandwidth ASIC packages.
• Conduct advanced power and signal integrity analysis for board and MCM packages.
• Provide expert design guidance for power distribution networks, collaborating with digital design, package, and board teams.
• Recommend and implement improvements to power and signal nets, enhancing overall system reliability.
• Perform circuit simulations using Hspice netlists and full-chip models.
• Develop and validate behavioral models (IBIS) for I/Os, supporting high-speed USB3/USB2 interfaces in integrated mobile platforms.
• Utilize industry-standard tools (Cadence PowerSI, 3DEFM, T2B, PowerDC, Agilent ADS, Nimbic, AllegroSIP) for analysis and design.

Required Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Electronics, or related field.
• Familiarity and expertise with at-least one of the high speed interfaces such PCIe Gen6/7, DDR5/LPDDR5, ONFI, USB3.2/USB4 etc.
• Minimum 8–12 years of relevant experience in SI/PI analysis, board/package design, and use of modern simulation tools (Hspice, ADS, Cadence, HFSS, Siemens Advanced Solvers).
• Expertise in Power delivery network concepts and signal integrity analysis.
• Technical proficiency in S-parameter extraction, 3D modeling, system-level SI simulation, and IBIS model development.
• Programming skills in Perl, TCL, Shell, and C.
• Hands-on experience with industry-standard EDA tools (Cadence PowerSI, Agilent ADS, Allegro SIP, Ansys SIwave, Siemens Advanced Solver).
• Familiarity with CMOS process technologies and specifications of various I/Os.
• Comfortable working in Linux environments.
• Relevant certifications in SI/PI analysis, simulation tools, or hardware design (preferred).