Total 499 structural engineer job vacancies in Art / Design / Entertainment category in Singapore

THE ROLE:

AMD is seeking a talented, motivated and self-driven digital design engineer to be part of the SerDes Technology group. You will be part of the team developing SerDes/Transceiver designs and solutions. The role involves work on all aspects of the FPGA/ASIC digital design flow including architectural specification, test planning, RTL design, functional verification, through synthesis and implementation to hardware and post silicon validation.

THE PERSON:

The successful candidate will execute digital design work and contribute technically with a high general impact on the overall design. We are seeking a team player who is innovative, highly accurate and detail-oriented, willing to learn, and possessing excellent communication and problem-solving skills to join our design team.

KEY RESPONSIBILITIES:

• Design and development with leading edge technology nodes on digital logic blocks.
• DFT implementation and verification.
• Perform test bench development and functional verification of developed digital logic blocks.
• Perform post silicon validation, testing and debug of block functionality on prototype silicon.
• Work closely with system architect, project manager, design and verification teams to develop design specifications documents, verification plans, and validation test plans.

PREFERRED EXPERIENCE:

• Experience in ASIC or digital IC design, with hands‑on involvement in RTL development (Verilog/SystemVerilog) for complex digital blocks or subsystems.
• Exposure to the front‑end digital design flow, including RTL coding, functional verification, lint/CDC checks, logic synthesis, and timing analysis.
• Experience contributing to one or more ASIC or FPGA tapeouts, either at block or subsystem level.
• Familiarity with DFT concepts and flows; hands‑on experience is a plus but not mandatory.
• Exposure to post‑silicon validation, testing, or debug, with an interest in understanding silicon behaviour and root‑cause analysis.
• Background in high‑performance or high‑speed digital designs (e.g., SoC interconnects, memory interfaces, I/O subsystems, data‑path logic) is advantageous.
• Knowledge of SystemVerilog and UVM is a plus.
• Strong problem‑solving skills, willingness to learn new domains (e.g., SerDes/transceiver logic), and ability to collaborate effectively with cross‑functional teams.

ACADEMIC CREDENTIALS:

• Bachelor or Masters Degree in Electronic Engineering.

LOCATION:

Singapore

THE ROLE:

AMD is seeking a talented, motivated and self-driven digital design engineer to be part of the SerDes Technology group. You will be part of the team developing SerDes/Transceiver designs and solutions. The role involves work on all aspects of the FPGA/ASIC digital design flow including architectural specification, test planning, RTL design, functional verification, through synthesis and implementation to hardware and post silicon validation.

THE PERSON:

The successful candidate will execute digital design work and contribute technically with a high general impact on the overall design. We are seeking a team player who is innovative, highly accurate and detail-oriented, willing to learn, and possessing excellent communication and problem-solving skills to join our design team.

KEY RESPONSIBILITIES:

• Design and development with leading edge technology nodes on digital logic blocks.
• DFT implementation and verification.
• Perform test bench development and functional verification of developed digital logic blocks.
• Perform post silicon validation, testing and debug of block functionality on prototype silicon.
• Work closely with system architect, project manager, design and verification teams to develop design specifications documents, verification plans, and validation test plans.

PREFERRED EXPERIENCE:

• Experience in ASIC or digital IC design, with hands‑on involvement in RTL development (Verilog/SystemVerilog) for complex digital blocks or subsystems.
• Exposure to the front‑end digital design flow, including RTL coding, functional verification, lint/CDC checks, logic synthesis, and timing analysis.
• Experience contributing to one or more ASIC or FPGA tapeouts, either at block or subsystem level.
• Familiarity with DFT concepts and flows; hands‑on experience is a plus but not mandatory.
• Exposure to post‑silicon validation, testing, or debug, with an interest in understanding silicon behaviour and root‑cause analysis.
• Background in high‑performance or high‑speed digital designs (e.g., SoC interconnects, memory interfaces, I/O subsystems, data‑path logic) is advantageous.
• Knowledge of SystemVerilog and UVM is a plus.
• Strong problem‑solving skills, willingness to learn new domains (e.g., SerDes/transceiver logic), and ability to collaborate effectively with cross‑functional teams.

ACADEMIC CREDENTIALS:

• Bachelor or Masters Degree in Electronic Engineering.

LOCATION:

Singapore

About the Company

Ranked among the Top 300 Employers in the Singapore Opportunity Index (SOI) 2025, AcePLP is a Singapore-based digital construction company powering the Architecture, Engineering, and Construction (AEC) industry through Building Information Modelling (BIM).

Through BIM, we help projects navigate complexity —improving coordination, reducing rework, enhancing safety, and enabling more predictable project delivery in one of the world’s most demanding urban environments. BIM professionals play an increasingly critical role in shaping how our city is designed and delivered.

As digital construction grows, skilled BIM professionals are in high demand. As career launchers and career builders, AcePLP invest in our people through structured training, real project exposure, and clear progression pathways — building the next generation of digital construction specialists.

Roles & Responsibilities

AcePLP is a Singapore-based leader in Building Information Modelling (BIM) services for the Architecture, Engineering, and Construction (AEC) industries. We deliver high-quality BIM solutions across project lifecycles and help clients digitize and manage construction and facility data.

We are committed to developing talent at every stage of their career:

• Entry-level professionals gain practical, industry-ready skills through hands-on training.

• Experienced professionals can follow structured pathways to grow their expertise and advance their careers.

26-Month Structured BIM Apprenticeship Programme
Join our apprenticeship programme to become an Accredited BIM Professional in Singapore’s high-demand Digital Delivery industry:

• Free two-month intensive technical training in BIM and CAD.

• On-the-job experience across commercial, educational, industrial, and healthcare projects.

• Guidance from experienced Trainers and Resource Managers.

• Build expertise, expand your professional network, and earn recognition for further studies (SUSS [Bachelor of Building and Project Management] and NUS [Bachelor of Technology in Engineering] programmes).

• Sponsorship opportunities for further studies may be available (terms apply).

Duties and Responsibilities:

Reporting to the client’s assigned supervisor and Resource Manager, you will:

• Learn and demonstrate proficiency in construction codes, BIM tools, and workflow processes.

• Undertake BIM modelling and CAD drafting across various project types.

• Develop BIM models, shop drawings, as-built drawings, and submission documentation.

• Review work for completeness and accuracy.

• Perform ad-hoc duties as assigned.

Who Should Apply:

• Entry-level or mid-career professionals passionate about the Built Environment sector.

• Relevant educational backgrounds: Architecture, Mechanical, Electrical, Civil, Structural Engineering, Construction/Project Management, Green Building & Sustainability, Facilities Management, or related engineering/design fields.

• Professionals with prior BIM experience may fast-track their development through a skills test.

At AcePLP, we don’t just offer jobs—we provide a verified pathway to a high-demand career in Singapore’s Digital Delivery industry.

Apply here: https://aces.aceplp.com.sg/apply/?cg

ASSISTANT DESIGN MANAGER (C&S) - LTA Project

• Industry: A1 Main Contractor - Korean MNC
• Office is near Jurong East MRT, Singapore
• Site is at Jurong East MRT
• 5.5 Days, 8am-6pm / 8am-12pm
• Salary: $6500 - $8500 + Bonus

Job Requirements,

• Minimum 7 years of experience with Degree / Diploma in relevant architectural field in the construction supervision of architectural works for projects
• LTA / Building experience will be beneficial as current ongoing project is related to MRT.
• Relevant experience in construction company
• Good knowledge of structure and architectural details

Job Description

• Assist (Senior) Design manager, supervise architectural works and ensure all works are carried out in compliance with standards, safety & environment regulations
• Manage the drawing submission schedules based on the planned work progress
• Coordinate and review all design matters with LTA, authorities, consultants, subcontractors, etc.
• Manage and control design deliverables related to BIM, technical, contractual and cost issues
• Manage subcontractors, review shop drawings to check to meet all design requirements
• Plan and Manage Architectural work progress scheduling, etc.

If you are keen to apply, please send me your resume and job applied for on WhatsApp at 9789 3505 or email me at anabel.thesupreme@gmail.com (˶ᵔ ᵕ ᵔ˶)

❄️Anabel Boon Xue Qi | Recruitment Consultant (R25159272) |

Responsibilities

• Responsible for algorithms and logic design and verification related to ASIC/AI/CPU chips under advanced processes
• Responsible for chip testability design and related work
• Responsible for maintaining the IC development environment and tool processes for chips, as well as designing In-House EDA tools

▌ Requirements

• Bachelor's degree or higher in fields including but not limited to Mathematics, Physics, Electronic Science and Technology, Microelectronics, Information and Communication Engineering, Computer Science and Technology, or Materials Science and Engineering
• Understanding of the IC development process, with a certain theoretical foundation in digital circuits, practical skills, and innovation ability

Regret to inform that only shortlisted candidates will be notified.
www.dadaconsultants.com
EA Registration Number: R1878287
Business Registration Number: 201735941W.

Job Description:

• Support the technical team and construction team for all design matters.
• Review all technical documentation and drawings of the Project works.
• Work closely with consultant on the scope of services, design and project deliverables to enhance site efficiency and constructability.
• Manage design approval process and coordination with the clients, consultants and subcontractors in a timely manner to resolve all technical issues.
• Ensure strict compliance of the design in accordance with contractual requirements.
• Identifies and highlight to management and project team of any potential risks or issues that will impact project performance.
• Support tender team and prepare technical tender documents as per specifications for bidding of civil and structural engineering projects as when assigned.

Job Requirement:

• PE Board Recognised Degree in Civil Engineering.
• Minimum 1 year of design management experience with at least 2 year of design experience in consultant firm.
• Strong coordination and collaboration with other disciplines.
• Good interpersonal and communication skills .
• Good organization and time management skills.

Our clients are seeking a Design Engineer to drive innovation in process plant design. This role offers the opportunity to lead piping and structural layouts, ensure compliance with ASME standards, and deliver optimized, value-engineered solutions. You’ll collaborate closely with clients and project teams, translating technical expertise into practical, high impact designs.

Key Responsibilities

• Design and optimize piping layouts, facility layouts, and structural designs

• Prepare and review piping material specifications for compliance with industry standards

• Coordinate and validate static and dynamic pipe stress analyses

• Generate and review piping, support, isometric, and steel structure drawings

• Provide value engineering proposals during tenders and projects

• Liaise with clients and project managers to clarify requirements and ensure alignment

• Oversee site works to confirm adherence to design drawings and calculations

• Prepare as-built drawings and calculations for submission

Key Requirements

• Degree in Mechanical, Electrical, or Piping/Plumbing Engineering (MEP-related discipline)

• Several years of experience in the design and engineering of process plants preferred

• Strong sketching ability and clear communication skills for team collaboration

• Proficiency in MS Office and AutoCAD; knowledge of Plant3D, Revit, and Advanced Steel is advantageous

• Highly motivated, proactive, and adaptable to new challenges

• Strong analytical problem-solving skills and time management abilities

• Experience coordinating structural drawings and clarifying client requirements

Benefits & Perks

• AWS + Variable bonus

• Transport + Mobile allowance

• Medical & Dental benefit

• Annual leave + Birthday leave

• Career progression opportunity

**We regret that only shortlisted candidates will be notified.

Your Profile will be kept in our database for more career opportunities.

We wish you all the best in your job search.

EA personnel: Ong Ping Tiong

EA personnel Reg No: R25127323

EA License No: 24C2562

Our Client:

Construction Engineering (Sub-contractor)

6 days, Mon-Sat

Central Region (beside MRT)

UP $4,500 + VB!

Job Responsibilities:

• Lead ACMV project execution by interpreting specifications, drawings, and client requirements

• Perform technical calculations (e.g., ACMV performance, ventilation, pressurization) to ensure optimal system design

• Coordinate installations across multiple trades to ensure smooth project integration

• Support testing, commissioning, documentation, and variation submissions to ensure successful delivery
  

Job Requirements:

• Relevant qualification in Mechanical Engineering (ITE/Diploma/Degree or equivalent)

• At least 1-2 years of experience in managing ACMV projects in industrial or commercial settings

• Strong communication and interpersonal skills for effective coordination with good problem-solving and project management abilities with a team-oriented mindset
  

For interested applicants, please click "Quick Apply”

We regret to inform that only shortlisted candidates would be notified.

By submitting your personal data and/or resume, you will be deemed to have agreed and consented to us collecting, using, retaining, and disclosing your personal information to prospective employers for their consideration.

Yvette Jerramie Galang Manalo | EA Reg No: R1659970

JTE Recruit Pte Ltd | EA Lic No: 14C7215

THE ROLE: 

We are looking for an adaptive, self-motivative Design Verification (DV) engineer to join our growing PLL team. As a key contributor, you will be part of a leading team that drives and improves AMD's ability to deliver the highest quality, industry-leading technologies to the market. The Design Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. 

THE PERSON:

• Excellent analytical and critical thinking skills along with attention to details
• Must be an initiative-taker, able to drive tasks independently and efficiently to completion
• Strong/effective communication skills
• Enthusiastic team-first mentality
• Ability to provide mentorship and guidance to junior engineers

KEY RESPONSIBILITIES:

• Analyze complex verification and digital design problems and propose verification / micro-architecture solutions

• Develop RTL and Firmware validation.

• Drive/develop ASIC verification flows and scripts.

• Create Verification architecture.

• Work with the RTL Design team to ensure functional correctness and coverage.
• Support silicon bring-up and diagnostics.

• Support Post-silicon debug, root cause bug, provide solution or workaround.

PREFERRED EXPERIENCE:

• Proven experience in design verification from specification to successful silicon.
• Experience in PLL, high-speed interfaces such as DDR, PCIe and high-speed SERDES.
• Experience in designs with multiple power domains.
• Experience in designs with multiple clock domains.
• Experience in behavior modeling for Analog Circuits.
• Experience in industry-standard ASIC CAD tools for verification, simulation, synthesis, STA, CDC, UPF, power estimation, etc
• Progressive experience in RTL Design

ACADEMIC CREDENTIALS:

• Bachelors or Masters Degree in Computer Engineering/Electrical Engineering 

Job Description:

- Perform Civil, Structural Analysis and Design (entry-level) to meet project specifications

- Coordination and Liaise with Clients, Authority and Other Consultants, Contractors on Projects

- Ensuring Good Project Documentation and Submission to Authority and Clients

- Attend Project Meeting and Perform Inspections on Designed Works

- Reporting to Senior Engineer

Job Requirements:

- Candidate must possess at least a Bachelor's Degree / Post-Graduate Diploma / Professional Degree in Engineering (Civil/ Structural) or equivalent, recognized by Professional Engineering Board of Singapore

- At least 1 Year (s) of working experience in the related field is required for this position

- Good Working Attitude, Self-Motivated, Positive Thinking, Independent, Discipline, Attention to Details and Ownership of Tasks

- Familiar with Local Design Standard and Code

- Knowledge of Design Software, e.g., STAAD Pro, Plaxis, AutoCAD will be added advantage

- Candidate with longer experience or qualifications will be considered for Senior Positions

• Design and develop automation and semiconductor equipment modules, optimizing performance, yield, and manufacturability using Design of Experiments (DOE).
• Lead the product development lifecycle from concept, design, and prototyping through validation and transition to high-volume manufacturing.
• Collaborate with Engineering, Integration, Modules, and cross-functional teams to troubleshoot technical challenges and ensure alignment throughout project execution.
• Ensure designs are manufacturing-ready, supporting integration into production with a focus on scalability, reliability, and cost efficiency.
• Define performance metrics, monitor development progress, and prepare technical reports and documentation for continuous improvement.

Requirements:

• Degree in Mechanical/Mechatronics Engineering or equivalent
• At least 3 years of experience in automation or semiconductor equipment design, with knowledge of high-precision machine design.
• Proficient in 3D CAD software and capable of producing detailed mechanical drawings with GD&T understanding.
• Strong problem-solving skills with the ability to collaborate across teams and support manufacturing integration.

If you are keen to apply for the position, kindly email your detailed resume in MS Word to hr@recruit-expert.com

Please note that only shortlisted candidates will be notified.

For more job opportunities, please visit our website at www.recruit-expert.com

EA Licence: 19C9701
Registration: R26160345

Job Descriptions

• Develop and Review Test Plan based on IC design specification
• Develop constrained-Random verification environment for complex DUT
• Develop/Modify Testbenches and test programmes using UVM-SV for Pre-Silicon IP/ICs/SOCs and ensure product meet their performance
• Implement coverage matrix using cover point and assertion
• Create and debug tests for DUT
• Resolve bugs with remote designers

Requirements

• Bachelor/Masters Degree in Electrical/Electronics/Computer Engineering with 1 year or more experience
• Hands-on experience in Silicon/ IP verification using SystemVerilog/ UVM
• Strong understanding of verification process from test plan to coverage completion
• Strong communication and Analytical skills
• Understanding of HDL (Verilog, VHDL)
• Experience in using leading EDA software tools like Cadence/ Synopsys

Ethos Search Associates Pte. Ltd.

EA Licence No: 13C6655
EA Reg No: R1109557 Rose

Job Descriptions

• Develop and Review Test Plan based on IC design specification
• Develop constrained-Random verification environment for complex DUT
• Develop/Modify Testbenches and test programmes using UVM-SV for Pre-Silicon IP/ICs/SOCs and ensure product meet their performance
• Implement coverage matrix using cover point and assertion
• Create and debug tests for DUT
• Resolve bugs with remote designers

Requirements

• Bachelor/Masters Degree in Electrical/Electronics/Computer Engineering with min 1 year of experience
• Hands-on experience in Silicon/ IP verification using SystemVerilog/ UVM
• Strong understanding of verification process from test plan to coverage completion
• Strong communication and Analytical skills
• Understanding of HDL (Verilog, VHDL)
• Experience in using leading EDA software tools like Cadence/ Synopsys

Job Descriptions

• Responsible for IP / sub-system level digital design development, RTL coding and implementation
• Design and development with leading edge technology nodes on digital logic blocks
• DFT implementation and verification.
• Perform test bench development and functional verification of developed digital logic blocks.
• Perform post silicon validation, testing and debug of block functionality on prototype silicon.
• Work closely with stakeholders to develop design specifications documents, verification plans, and validation test plans.

Job Requirements:

• Bachelor/Master Degree in Electronics Engineering or equivalent
• 1 year or more related experience in ASIC/digital IC development with completion of complex ASIC or IC tapeouts.
• Working experience of RTL coding in Verilog/VHDL language, verification, logic synthesis and DFT in high performance design.
• Experience in test planning/creation/analysis of DFT/ATPG scan and silicon validation.
• Excellent communication skill and team player
• Knowledge of UVM is an advantage.

We invite suitable candidate to apply online or email your CV to resume@ethos-search.com
Ethos Search Associates - EA No: 13C6655
Rose - Reg No: R1109557

Job Responsibilities

• Collaborate with architects, hardware engineers, and firmware engineers to analyze and understand new features for verification
• Develop comprehensive test plan documentation considering interactions among features, hardware, firmware, and software drivers
• Estimate time requirements for writing new feature tests and modifying the test environment
• Design and implement directed and random verification tests to validate new features
• Debug test failures to identify root causes and collaborate with RTL and firmware engineers to resolve design defects and test issues
• Review functional and code coverage metrics and adjust or add tests to meet coverage goals
• Constrain random tests as needed to ensure thorough verification coverage

Job Requirements

• Bachelors/Masters degree in computer engineering/Electrical Engineering or equivalent 

• Proficient in IP-level ASIC verification processes
• Skilled in debugging firmware and RTL code using simulation tools
• Experienced in using UVM testbenches within Linux and Windows environments
• Knowledgeable in Verilog, SystemVerilog, and UVM methodologies
• Familiar with digital design, analog design, SerDes, PCIe, and Ethernet protocols
• Experienced in developing UVM-based verification frameworks, testbenches, and verification flows
• Skilled in Co-Simulation and UPF verification techniques
• Capable of automating workflows in distributed compute environments
• Exposure to simulation profiling, efficiency improvement, acceleration, and HLS tools/processes
• Strong understanding and hands-on experience with UVM concepts and SystemVerilog language
• Working knowledge of SystemC and TLM with related experience
• Proficient in scripting languages such as Perl, Python, Makefile, and shell scripting
• Experience in leadership or mentorship roles is an asset
• Prior exposure to video codec systems or multimedia solutions is desirable
• Familiarity with AI tools such as ChatGPT and MS-Copilot

We invite suitable candidates to apply online or email your CV to resume@ethos-search.com

Ethos Search Associates Pte. Ltd.

EA License No: 13C6655
EA Reg No: R1109557 Rose