Micron’s vision is to transform how the world uses information to enrich life for all. Join a world-class global team focused on one thing: using our expertise in the relentless pursuit of innovation to enable high value technology driven solutions for customers and partners. The solutions we create help make everything from virtual reality experiences to breakthroughs in supercomputing and artificial intelligence possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can spark the very innovation we are pursuing.
We are currently experiencing a ground-breaking period in artificial intelligence (AI), where AI is anticipated to become an integral component of daily life. This proliferation is being fueled by advances in memory and compute technologies. High bandwidth memory (HBM) is at the forefront of these innovations. Micron’s Advanced Packaging Technology Development (APTD) is responsible to deliver package development for high performance memory products and transfer to manufacturing.
We are looking for an Advanced Packaging Metrology-RDA Engineer to join our Advanced Packaging Technology Development (APTD) team!
Your responsibilities include but are not limited to developing and enabling innovative inspection and metrology techniques to enable advanced packaging technologies. You will also be required to identify, diagnose, and propose yield related breakthroughs. You will have opportunity to work with peers and partners across organizations to coordinate the development and launch of new metrology and RDA technologies for solutions that drive the future. Additional responsibilities include establishing equipment evaluation and long-range strategy to enable advanced packaging technology roadmap.
Key responsibilities and duties include:
Recipe Development and Optimization:
Inspection and Characterization:
Data Analysis and Reporting:
Quality and Performance Indicators:
Collaboration and Coordination:
Work closely with various teams, including the Package Integration, PWF/Assembly Engineering, Front End Wafer Fab, Assembly/Test Engineering, Product Engineering, and Global Quality, to integrate manufacturing processes for optimal performance and quality control
Requirements
B.S/M.S./Ph.D. (or equivalent education) in Mechanical Engineering, Chemical Engineering, Electrical Engineering, Physics, or other related technical fields
2 or more years of semiconductor process or equipment engineering experience, preferably in wafer bonding, plating, warpage control and packaging field
Proficiency in Python, R, SQL for statistical analysis, process modeling, and data analytics.
Experience with Visual Basic for automation and tool integration.
Familiarity with E3, FDC (Fault Detection and Classification), and RMS (Recipe Management System) for equipment and process control.
Strong data analytics capabilities to support SPC, DOE, defect analysis, and dashboarding.
Strong understanding of process flows, process interactions, and how process changes can affect yield, performance, and reliability