Total 136 software engineer job vacancies in Bengaluru

Position Title: ITSM Process Manager

REPORTING TO:                              Service Delivery Manager

                                                         Eurofins IT Infrastructure Services Private Limited

GEOGRAPHICAL

REPORTING LOCATION:               Bangalore / India

WORKING LOCATION:                  Bangalore / India

OVERALL OBJECTIVES:                 

Eurofins IT Infrastructure Services Private Limited, looking for a skilled and experienced ITSM Specialist with 5 to 7 years of experience in implementing, managing, and optimizing IT Service Management processes. The ideal candidate should have a strong understanding of ITIL best practices and a proven track record of enhancing service delivery, governance, and process automation in complex IT environments.

Responsibilities:

• Own and manage ITSM processes (Incident, Change, Problem, Request, Knowledge, CMDB, Asset & Capacity).
• Define and maintain process documentation, RASCI charts, SOPs, and governance frameworks.
• Collaborate with ITSM tool administrators and developers for BMC Helix configurations with process needs.
• Monitor process KPIs, SLAs, and compliance metrics to ensure performance and continuous improvement.
• Lead process audits, identify gaps, and implement corrective actions.
• Facilitate process-related workshops, reviews, and training sessions.
• Coordinate across teams (Service Desk, Infrastructure, Applications) to drive process adoption and efficiency.
• Ensure CMDB data quality and process linkage across both tools.
• Participate in tool upgrades, configuration changes, and workflow updates impacting ITSM processes.
• Act as a liaison between tool owners (BMC Helix/ServiceNow) and business stakeholders to ensure the successful implementation of process changes.

Required Skills:

An ideal candidate should have strong experience in all the below:

• Extensive hands-on experience with BMC Helix and ServiceNow platforms
• Change Management – driving CAB meetings, evaluating risk and impact, and ensuring minimal disruption
• Problem Management – leading root cause analysis (RCA), trend analysis, and permanent solution implementation
• Incident Management – Drive MIM, ensuring SLA adherence, prioritization, and timely resolution of critical issues
• CMDB - Experience supporting or implementing CMDB updates, discovery tools, and asset lifecycle processes
• Collaborated with tool admins and developers to align configurations with process requirements
• Experience creating and interpreting dashboards, SLA/KPI reports, and trend analysis for operational improvement
• Strong communication and stakeholder engagement skills

Below skills will be an advantage:

• Exposure to process automation and workflow design
• Knowledge on Site 24X7 Monitoring tool.

Must-Have Qualifications

• BMC Helix tool work experience
• ITIL process hands on experience

Strong problem-solving and ready to take owner

Job Responsibilities: 

• Layout high performance Analog and Mixed Signal circuits using the latest Cadence Design Suite  

• Perform IP level layout tasks including device placement, routing, matching techniques, shielding, guard rings, and parasitic-aware layout practices.  

• Work at multiple levels of hierarchy, from macro level (block level) to Top-level (ESD/Pad frame) 

• Verify connectivity and design rules with Assura, Calibre, PVS 

• Use QRC extraction to analyze and reduce noisy/sensitive coupling 

• Use third party tools to analyze IR drops and p2p resistance 

• Liaise closely with analog designers on specific circuit requirements, e.g. power, matching, sensitivity, latch-up, ESD, etc. 

• Work with CAD and CAE engineers to improve processes or features 

We build and run an occupancy sensing platform that gets deployed inside enterprise client environments. That means our software lives on someone else's network — inside their VLANs, behind their firewalls, talking to their wireless controllers and switches.

When something breaks, the problem could be anywhere: the network config, the 802.1X authentication, the containerised services, the database, or our own code. The job is to figure out which layer it's in, fix what you can, and involve engineering when it needs to go deeper.

The honest version: you don't need to be a deep expert coming in. The previous person in this role built their specialisation on the job. What you do need is a solid enough foundation in networking and Linux that you can get up to speed quickly and work through unfamiliar problems without getting stuck.

• Team - Occupancy & IoT Platform — Client Delivery
• Location - Remote
• Start - As soon as possible
• Environment - Enterprise networks, Cisco infrastructure, Linux / Docker / Kubernetes

What You'll Be Doing :

• Troubleshooting connectivity issues between our sensors and backend systems — this means reading routing tables, checking ARP and CAM tables, and tracing packets across VLANs
• Working with client IT teams on 802.1X authentication setups — certificates, Cisco ISE policy, RADIUS flows, and why a device isn't getting onto the network it should be
• Investigating WLAN issues — access point associations, SSID configuration, wireless LAN controller settings, and RSSI or connectivity problems affecting sensor communication
• Pulling and interpreting SNMP data from managed switches and wireless controllers to diagnose device and network health
• Debugging infrastructure issues on the platform side — inspecting container logs, checking service health in Docker and Kubernetes, running database queries to understand what the data is telling you
• Remote access and diagnosis via SSH — a lot of the operational work happens this way
• Writing up what you find and building runbooks so the next issue like this takes less time to resolve

Networking — What We're Looking For

You should be able to work through network problems without needing someone to explain the basics to you. Specifically:

• IP addressing and subnetting — you can read a CIDR block, work out what's in and out of a subnet, and understand why a /24 and a /16 behave differently. Private ranges (10.x, 172.16.x, 192.168.x) should be second nature
• Routing — you can read a routing table, understand what 'via' and 'link' entries mean, and reason through why a packet is or isn't getting where it needs to go
• Switching — you understand how CAM tables work, what a VLAN is and why they exist, and how trunk ports carry tagged traffic between switches
• ARP — you know the relationship between IP and MAC addressing and can use the ARP table to diagnose link-local connectivity issues
• 802.1X — you've dealt with certificate-based network authentication in an enterprise context. You understand the EAP flow well enough to figure out where an authentication is failing
• Cisco ISE — familiarity with how ISE handles 802.1X policy is a plus, even if you haven't configured it yourself
• WLAN — access points, wireless LAN controllers, SSIDs, client association. You know the difference between an AP and a WLC and understand how a wireless client gets authenticated and onto the network
• SNMP — you know what OIDs and MIBs are, you've actually queried a managed device with SNMP, and you can interpret what you get back. SNMPv2 community strings and SNMPv3 certificate auth are both relevant here
• Cisco CMX / MSE — not required, but if you've worked with location services based on RSSI or TDOA data, that's directly useful

Systems & Infrastructure — What We're Looking For

The platform runs on Linux, in containers. A lot of debugging happens at this layer:

• Linux command line — you're comfortable in a shell. File navigation, process inspection, network tools (ping, traceroute, netstat, curl, dig), log tailing — all of this should feel normal, not effortful
• SSH — remote access is the default mode for most operational work
• Docker and docker-compose — you understand what a container is, how services are defined and networked in a compose file, and how to inspect a running container or read its logs
• Kubernetes — you don't need to build clusters, but you should understand pods, services, and deployments at an operational level and know how to use kubectl to check what's happening
• Python scripts — you're not a developer, but you can run a script, read what it does, and debug a basic error without it being a whole thing
• SQL — intermediate level. You'll write queries to investigate what the platform data is showing, check whether records exist, and cross-reference things across tables
• Log inspection — you know how to find a signal in a wall of output and work backwards from an error to its cause

Useful, Not Required

• Hands-on Cisco WLC or Prime Infrastructure experience — configuring or managing wireless controllers in a multi-AP environment
• Cisco ISE administration — building or modifying 802.1X policies, not just understanding how they work
• Experience with network monitoring tools and interpreting SNMP traps or polls at scale
• Any exposure to occupancy sensing, indoor positioning, or IoT device management

Are you passionate about conceptualizing, nurturing, developing, and proving new ideas and developing them into new solutions? Would you like to help create the next major innovation in and around the payment landscape pioneering and leveraging the most advanced devices, hardware and software in the world, anything, and everything in and around world’s largest payment ecosystem?

We’re looking for a seasoned individual to drive game-changing innovation in and around Visa’s partner eco-system for Asia Pacific, and specifically India. You should have experience technically leading and mentoring small multi-skilled squads of 3-4 engineers capable of rapid prototyping of new ideas as well as scale these to commercial solutions. You will be at the forefront of strategic partnerships, breakthrough technologies, new ideas, hackathons, demos, and rapid prototyping. You will work closely with business development teams, partners, and internal product teams and cross- leverage engineering talent internally and externally.

Responsibilities

·       Be at the heart of developing new ideas into demo-able products, and ultimately to commercial product.

·       Work alongside and collaborate with UX, engineering, and partner teams to deliver products, features, services, and tools.

·       Drive rapid prototyping cycles from technical requirements, software designs, programming, debugging, and optimization.

·       Explore and innovate new technologies, features, and tools.

·       Consult on a regular basis with leadership to align expectations and deliverables.

·       Be scrappy and work with the small team to the fullest to work on multiple parallel POCs and incubation efforts.

·       Able to scale the successful pilots to full commercial solutions.

·       Use stubs as needed to simulate capabilities lighting up soon.

·       Work collaboratively across team boundaries to share common infrastructure and functional capabilities. Provide feedback into core product teams to influence their roadmap and strategy

This is a hybrid position. Expectation of days in office will be confirmed by your hiring manager.

We are looking for technically sound and highly skilled Analog/High Speed DDR IO Layout designer with 8-12 years of experience. The ideal candidate should have a strong background in analog/IO design principles, hands-on experience with layout tools, and a passion for solving challenging technical problems.

Key Responsibilities:

• Develop and optimize MSIP IC layouts in TSMC 3nm, ensuring high performance and manufacturability.
• Collaborate with design engineers to understand design requirements and translate them into precise layouts.
• Strong experience in debugging DRC, ERC, LVS, EMIR and PERC issues independently.
• Work closely with the physical design team to integrate custom blocks into the overall chip design.
• Identify and resolve layout-related issues, providing creative solutions to meet design specifications.
• Conduct design reviews and provide technical feedback to improve layout practices and methodologies.
• Stay up-to-date with industry trends, tools, and technologies to continuously enhance layout processes
• Any prior AI knowledge/experience which can improve Layout development effort and QoR is a big plus

Qualifications

• 8-12 years of experience in Analog/High Speed DDR IO IC layout design.
• Proficiency in layout tools such as Cadence, Synopsys, or Mentor Graphics.
• Hands-on experience with custom layout design for Analog and IO circuits is required, including expertise in Bandgap references, LDOs, Clocking circuits, GPIOs, High speed DDR IOs.
• Familiarity with custom digital layout (i.e. high speed logic paths).
• Knowledge of signal integrity issues (i.e. clock/data routes, differential routing, shielding).
• Strong understanding of analog/IO design principles, including circuit performance and parasitic effects.
• Aware of layout techniques to mitigate ESD, latch-up issues.
• Holds advanced knowledge of CMOS and FinFET technologies and their impact on design and performance issues in deep sub-micron process nodes, specifically 5nm and below.
• Experience with layout concepts that incorporate reliability considerations, including techniques for managing electromigration (EM), IR drop, and self-heating.
• Experience with layout optimization for power, performance, and area (PPA) metrics.
• Excellent problem-solving skills and attention to detail.
• Effective communication and teamwork abilities.

Preferred Skills:

• Knowledge of scripting languages (e.g., Skill,TCL and SVRF) for automation tasks.

Lead Developer for Android HAL and middleware for Automotive SoCs. 

You will develop highly optimized software for Renesas R-Car Gen5 series devices. Strong working knowledge of Android and RTOS environment for multi-core heterogenous SoCs is a key requirement. You will implement requirements for the next-generation IVI/ADAS products that comprise tools, software, and hardware. Your main responsibilities will be in the following areas: 

Relevant working experience 

• RCAR Gen5 Android (AAOS/GKI) HAL & Middleware ownership—from bring-up to certification 

• Drive AAOS enablement on R-Car Gen5 variants and align to the platform Android roadmap (A16/A17…)  

• Ensure compatibility readiness (xTS/CTS/VTS) and support pre-cert / validation flows as part of BSP deliverables 

• Deliver production-grade components for SDK releases (docs, changelogs, release notes, packaging expectations)  

• Android HAL expertise (AIDL/HIDL) for automotive peripherals & SoC IP 

• Implement/extend HALs for display, audio, camera, sensors, power/thermal, boot-time optimizations, and device-specific features 

• Integrate vendor drivers and expose stable interfaces to Framework/AAOS (permissions, SELinux, init/ueventd, VINTF manifests) 

• Debug across layers (kernel↔driver↔HAL↔framework) using traces/logs (systrace/perfetto, logcat, ftrace) and root-cause systematically 

• Middleware & Framework integration for IVI/cockpit stacks 

• Build/maintain native services (binderized daemons), framework extensions, and vendor middleware to meet automotive UX/perf needs 

• Support long-term maintenance strategy (major upgrades + security/maintenance releases) with clean branching and backport discipline  

• Collaborate with partner stacks and “standard framework” integration expected in the Gen5 software model (BSP↔middleware↔apps)  

• Virtualization-ready design (Xen / multi-domain) and performance isolation 

• Enable Android as native or guest (Xen-based) with VirtIO-style device exposure where applicable; debug GVM boundaries  

• Address multi-domain constraints (timing, memory, I/O partitioning), and support fast-boot/boot KPI topics relevant to Gen5 programs  

• Work with security/TEE/boot-chain expectations typical of Gen5 platform packaging and delivery model  

• Quality, compliance, and delivery mindset (automotive-grade) 

• Own CI-friendly implementation: build reproducibility, automated tests, and regression triage across Android releases  

• Drive certification readiness: CTS/VTS execution, bug fixing, and evidence capture aligned to GAS/compatibility commitments  

• Communicate crisply with global stakeholders, document decisions, and support customer issue analysis and releases 

• Work as one of  the senior team members or as lead of analog IPs and deliver analog blocks on-time with state-of-the-art architecture to meet the overall product requirements
• Work closely with team in designing and delivering analog blocks
• Design analog modules from scratch
• Handling assigned tasks independently
• Pro-actively get design issues/problems resolved
• Contribute to or propose innovative design solutions and design methodologies
• Work closely with the layout engineers on providing requirements and guidelines

ESSENTIAL DUTIES AND RESPONSIBILITIES:

• Using sound test engineering principles, knowledge of the product and technology to ensure the product meets functional and customer requirements and is ready to ship on schedule
• Owns product validation regarding test plan definition, test plan execution, and primary lead in failure analysis
• Primary lead in performing performance characterization of product and tracking down any observed anomalies
• Contributes to overall test schedule development
• Writes the test plans for new product features, generates test matrices, test reports, and other relevant test documentation that is required for flawless program execution
• Defines new tests based on customer feedback and defect fixes
• Executes existing/regression test cases for the project during the entire product development cycle
• Works closely with the other system test, hardware, ASIC and firmware engineers to improve test methodology and develop new tests and new strategies
• Configures customer hardware and software systems; troubleshoot problems to get to root cause
• Maintains customer and test equipment to current revision

Language - Java 21, NodeJS22
Development IDE: Eclipse/ IntelliJ
Application Development Framework - Spring boot 3.5.5
Application Security- Azure Active Directory
Templating - Thymeleaf3
Logging Framework - SLF4J
Unit Testing Framework - JUnit 5
Mocking - Mockito
Test analysis - JaCoCo
Code quality, coverage and standards - SonarLint/ SonarQube
Build Tool - Maven
Continuous Integration/ Continuous Delivery - Git Lab, Terraform
Version Control - Git
Security Analysis - Snyk
Security Detection - Git Leaks
Local database - Postgres SQL/RDS Aurora
Local database client - DBeaver

Redica Systems is looking for a highly experienced Staff Quality Engineer to elevate software quality across our platform. This is a senior, hands-on individual contributor role focused on defining quality strategy, building scalable testing practices, and partnering closely with Engineering, Product, and Data teams.

You will be a technical authority in quality engineering, influencing how we design, test, and release software in a complex, data-driven, regulated environment. This role does not have people management responsibility but carries significant ownership, autonomy, and cross-functional influence.

Key Responsibilities

• Define, implement, and continuously improve scalable QA processes, frameworks, and best practices
• Design, build, and maintain automated testing solutions across frontend, backend, and data workflows
• Establish and track quality metrics to measure product health, risk, and release readiness
• Partner closely with Engineering, Product, and Data teams to embed quality early in the SDLC
• Lead test planning, execution, and sign-off for complex releases and high-impact initiatives
• Identify quality risks and proactively define mitigation strategies
• Act as a subject matter expert for system architecture, quality tradeoffs, and testing approaches
• Improve CI/CD pipelines through test automation and quality gates
• Review defects and failures to identify root causes and drive systemic improvements
• Mentor and guide other QA engineers through technical leadership, code reviews, and best-practice sharing

About You

• Tech Savvy: Advanced expertise in software quality engineering, including test strategy, automation, and validation for complex, data-driven, and regulated systems. Deep hands-on experience with test automation frameworks and tooling, and the ability to integrate quality signals into CI/CD pipelines to improve reliability and delivery velocity.
• Decision Quality: Strong ability to identify, assess, and mitigate quality and release risks across interconnected systems and workflows. Uses evidence, metrics, and judgment to inform release readiness decisions and clearly communicate tradeoffs and risk to stakeholders.
• Manages Complexity: Systems-level thinking with a deep understanding of how services, integrations, and data pipelines interact and impact overall quality. Anticipates downstream effects of changes and validates behavior across end-to-end workflows, not just isolated components.
• Problem Solving: Proven ability to design effective, scalable test strategies and investigate complex defects to uncover root causes. Translates findings into long-term improvements to test coverage, system design, and quality practices.
• Engaged: Not only shares our values but also possesses the essential competencies needed to thrive at Redica, as outlined here: https://redica.com/about-us/careers

As a Senior Technical Support Engineer reporting to the Technical Support Lead, you will play a crucial role in overseeing and coordinating the technical support operations within the organization. You will be responsible for resolving complex technical issues and maintaining high levels of customer satisfaction. Additionally, you will collaborate with other departments to identify and implement process improvements and contribute to the overall success of the organization.

Key Responsibilities

• Handle and resolve complex technical issues escalated by the support team or customers
• Troubleshoot problems, identify root causes, and implement effective solutions in a timely manner
• Maintain a high level of customer satisfaction by ensuring prompt and accurate responses to customer inquiries and issues
• Collaborate with cross-functional teams to identify areas for process improvement within the technical support function
• Track and analyze key performance metrics related to technical support, such as response time, resolution time, and customer satisfaction
• Support AWS cloud-based application troubleshooting, including log analysis and service-level monitoring where required
• Assist with SSO configurations, authentication issues, access provisioning/deprovisioning, and user onboarding activities
• Work closely with DevOps and Engineering teams during incident management, deployments, and production issue triaging to ensure minimal service disruption
• Coordinate incident response activities by engaging relevant stakeholders and following defined escalation paths
• Maintain and execute incident management and communication runbooks during production incidents or customer-impacting outages
• Support customer-facing communications during incidents by providing timely updates and coordinating with internal teams
• Assist in monitoring alerts, analyzing logs, and escalating issues based on impact and severity
• Follow secure operational practices aligned with SOC 2 and ISO 27001 requirements while handling customer environments and access-related requests
• Maintain documentation of technical processes, troubleshooting steps, incident timelines, and standard operating procedures
• Provide end-user technical support to internal employees and contractors, including troubleshooting of hardware, software, access, and connectivity-related issues
• Support internal SaaS applications and workplace tools, including access provisioning, MFA support, and basic configuration
• Assist with onboarding and offboarding support activities such as account setup, device configuration, and access enablement, based on approved requests

About You

• Customer Focus: Incorporates customer insights into decision-making to ensure high-quality technical support services
• Tech Savvy: Anticipates and adopts innovations in SaaS platforms and cloud-based technology solutions
• Manages Complexity: Effectively solves technical problems across application, infrastructure, and access-related domains
• Decision Quality: Makes timely and effective decisions to resolve issues efficiently
• Collaborates: Engages in cross-functional problem-solving with Engineering, DevOps, and Security teams
• Communication Effectively: Provides clear and concise technical and incident-related updates to internal stakeholders and customers
• Resilience: Learns from operational challenges and continuously improves support processes
• Engaged: Demonstrates competencies required to thrive in a fast-paced technical support environment as outlined here

The Data Reliability Engineer supports the design, implementation, and ongoing improvement of cloud-native, containerized infrastructure that powers our data products and services. This role contributes to the reliability, scalability, security, and operational health of our data ecosystem while working closely with more experienced engineers and cross-functional teams.

In this role, you will help maintain and enhance platforms and services used across the Data organization. You will participate in day-to-day engineering efforts, support production operations, assist with automation and infrastructure improvements, and contribute to the successful delivery of data platform capabilities.

You will work with a modern data stack that includes Data Services running on EKS, such as Superset, Trino, Apache Doris ClickHouse, OpenMetadata and other platform components, as well as Databricks (Spark jobs), Airflow, and other Big Data technologies. The team is also expanding into new areas, including helping deploy and implement AI agents, providing opportunities to contribute to innovative solutions at the intersection of data and AI.

This is a strong opportunity for an engineer with a solid technical foundation who is eager to grow skills in cloud infrastructure, platform engineering, data systems, and reliability practices in a collaborative environment

This is a hybrid position. Expectation of days in office will be confirmed by your hiring manager.

Responsibilities:

• Work independently with minimal direction to provide product definition, design deliverables, technical design reviews, and analysis and troubleshooting of prototype and production boards.
• Perform schematic design and PCB layout for complex SoC‑based systems, based on system requirements, datasheets, vendor reference designs, and engineering best practices.
• Review schematics and PCB layouts using established design checklists and best practices.  Provide detailed, actionable feedback to designers.  Update checklists as appropriate.
• Collaborate cross‑functionally with marketing, management, and engineering development teams to continuously improve the usefulness and marketability of design solutions.
• Develop, maintain, and clearly communicate system‑, block‑, and component‑level design collateral to internal teams, partners, customers, and other stakeholders.
• Engage with global teams, partners, customers, and vendors to lead technical discussions; align tasks and priorities; and build shared understanding of current and future components, requirements, standards, and automotive industry trends.
• Support marketing demo preparation, debug, and coordination activities.
• Provide mentorship and technical guidance to junior applications engineers.

We are looking for technically sound and highly skilled Analog/High Speed DDR IO Layout designer with 8-12 years of experience. The ideal candidate should have a strong background in analog/IO design principles, hands-on experience with layout tools, and a passion for solving challenging technical problems.

Key Responsibilities:

• Develop and optimize MSIP IC layouts in TSMC 3nm, ensuring high performance and manufacturability.
• Collaborate with design engineers to understand design requirements and translate them into precise layouts.
• Strong experience in debugging DRC, ERC, LVS, EMIR and PERC issues independently.
• Work closely with the physical design team to integrate custom blocks into the overall chip design.
• Identify and resolve layout-related issues, providing creative solutions to meet design specifications.
• Conduct design reviews and provide technical feedback to improve layout practices and methodologies.
• Stay up-to-date with industry trends, tools, and technologies to continuously enhance layout processes
• Any prior AI knowledge/experience which can improve Layout development effort and QoR is a big plus

Qualifications

• 8-12 years of experience in Analog/High Speed DDR IO IC layout design.
• Proficiency in layout tools such as Cadence, Synopsys, or Mentor Graphics.
• Hands-on experience with custom layout design for Analog and IO circuits is required, including expertise in Bandgap references, LDOs, Clocking circuits, GPIOs, High speed DDR IOs.
• Familiarity with custom digital layout (i.e. high speed logic paths).
• Knowledge of signal integrity issues (i.e. clock/data routes, differential routing, shielding).
• Strong understanding of analog/IO design principles, including circuit performance and parasitic effects.
• Aware of layout techniques to mitigate ESD, latch-up issues.
• Holds advanced knowledge of CMOS and FinFET technologies and their impact on design and performance issues in deep sub-micron process nodes, specifically 5nm and below.
• Experience with layout concepts that incorporate reliability considerations, including techniques for managing electromigration (EM), IR drop, and self-heating.
• Experience with layout optimization for power, performance, and area (PPA) metrics.
• Excellent problem-solving skills and attention to detail.
• Effective communication and teamwork abilities.

Preferred Skills:

• Knowledge of scripting languages (e.g., Skill,TCL and SVRF) for automation tasks.

Key Responsibilities

• Lead, mentor and deliver technical contributions for designing advanced high bandwidth ASIC packages.
• Conduct advanced power and signal integrity analysis for board and MCM packages.
• Provide expert design guidance for power distribution networks, collaborating with digital design, package, and board teams.
• Recommend and implement improvements to power and signal nets, enhancing overall system reliability.
• Perform circuit simulations using Hspice netlists and full-chip models.
• Develop and validate behavioral models (IBIS) for I/Os, supporting high-speed USB3/USB2 interfaces in integrated mobile platforms.
• Utilize industry-standard tools (Cadence PowerSI, 3DEFM, T2B, PowerDC, Agilent ADS, Nimbic, AllegroSIP) for analysis and design.

Required Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Electronics, or related field.
• Familiarity and expertise with at-least one of the high speed interfaces such PCIe Gen6/7, DDR5/LPDDR5, ONFI, USB3.2/USB4 etc.
• Minimum 8–12 years of relevant experience in SI/PI analysis, board/package design, and use of modern simulation tools (Hspice, ADS, Cadence, HFSS, Siemens Advanced Solvers).
• Expertise in Power delivery network concepts and signal integrity analysis.
• Technical proficiency in S-parameter extraction, 3D modeling, system-level SI simulation, and IBIS model development.
• Programming skills in Perl, TCL, Shell, and C.
• Hands-on experience with industry-standard EDA tools (Cadence PowerSI, Agilent ADS, Allegro SIP, Ansys SIwave, Siemens Advanced Solver).
• Familiarity with CMOS process technologies and specifications of various I/Os.
• Comfortable working in Linux environments.
• Relevant certifications in SI/PI analysis, simulation tools, or hardware design (preferred).