Total 2 job vacancies by Zerro Power Systems Pte. Ltd.

Company Overview

Zerro Power Systems Pte. Ltd. began in 2017, specializing in motor controller solutions. The team comprises experts with over 30 years of experience in circuit design across diverse applications.

Job Summary

Design and verify RTL-level digital circuits, collaborate with backend teams on synthesis and timing, and perform functional and FPGA verification to ensure robust mixed-signal IC designs.

Responsibilities

• Design RTL-level digital circuits for synchronous and asynchronous applications involving multiple clock domains to meet functional requirements
• Perform digital functional verification and FPGA verification to validate design correctness and performance
• Collaborate with backend teams to execute digital synthesis, place-and-route, design for test, and static timing analysis for optimized chip implementation
• Troubleshoot and resolve design and verification issues to ensure reliable IC functionality
• Support function verification activities by developing and executing test plans and simulations

Required competencies and certifications

• Bachelor’s or Master’s degree in Electronics or Electrical Engineering
• Minimum 2-3 years of experience in application and validation of digital designs
• Knowledge of Verilog coding, design, simulation, and verification methodologies
• Basic understanding of logic synthesis, place-and-route, static timing analysis, and logic equivalency checking

Preferred competencies and qualifications

• Experience using Cadence tools such as Incisive Enterprise Simulator, SimVision, Genus, First Encounter, Conformal, Modus, Tempus, and Virtuoso

JOB DESCRIPTION

• RTL-level digital design and problem solving
• Function verification and support
• Work closely with backend team on Digital synthesis, place-and-route, Design for Test and Static timing analysis
• Lead and guide junior engineers
• Digital functional verification and FPGA verification

JOB REQUIREMENTS

• Bachelor/Masters in Electronics/Electrical Engineering with Mixed Signal IC design/verification experience.
• At least 7-10 Year(s) of working experience in application/ validation
• Fluent in Verilog coding, design, simulation, and verification domains
• Definition and implementation of custom digital interfaces (I2C, 3-wire, single_wire etc.)
• Definition and implementation of custom finite state machines, register maps, control logic which interface with analog circuits such as drivers and proprietary IPs like OTP or flash memory
• RTL design for synchronous and asynchronous applications, including multiple clock domains
• Basic knowledge of Logic synthesis, place & route, static timing analysis, logic equivalency checking
• Usage of Cadence tools like Incisive Enterprise Simulator, SimVision, Genus, First Encounter, Conformal, Modus, Tempus and Virtuoso will be preferred