Total 146 network engineer job vacancies in Education / Training category in Singapore

PLC/SCADA Associate Engineer 
Salary: $3200
Working Days: 5 days, 8.30am to 5.50pm
Location: Bedok, travelling to site required 

Job Scope:

• Responsible for integration and implementation of both hardware and software engineering work
• Carry out proper planning, execution and supervision of the integration work and do QA technical checks throughout the project execution
• Handle application programme change management, hardware deployment management and documentation
• Implementation of PLC/SCADA project from concept to design and programming
• Interface with SCADA and PLC programming
• Meeting with clients, doing reports and documentation
• Perform troubleshoot independently

Requirements:

• Diploma in Electrical/Electronic or related discipline
• 1-2 years of experience or some knowledge in PLC and SCADA
• Site maintenance and travelling around SG for site maintenance is required

Email: supreme.jacksontan@gmail.com

Tan Yong Zhi (Jackson) | Reg: R24124461

The Supreme HR Advisory Pte. Ltd | EA No: 14C7279

The Future Communications Translation Lab (FCTLab) at the Singapore Institute of Technology (SIT) is seeking a motivated candidate who is keen on both rigorous research and the practical application of 5G and future communication technologies. As part of the research team, you will collaborate with faculty and industry partners to drive innovation in 5G systems and their real-world use cases. Equipped with private 5G testbeds and advanced test and measurement instruments, FCTLab provides an ideal environment to develop, validate, and refine next-generation communication technologies while accelerating their translation into impactful and industry-ready solutions. As a 5G Systems Research Engineer/Fellow, you will design, operate, and optimize the lab’s 5G infrastructure and support experimental studies that advance new 5G features and use cases.

Key Responsibilities

• Operate and maintain FCTLab’s 5G infrastructure, including O-RAN testbed, traditional RAN testbed, and open-source 5G testbeds.
• Design and execute experiments to evaluate 5G systems and use-case performance through simulations, emulations, physical testbeds, and commercial networks. Collect and analyze KPIs such as throughput, latency, and reliability, and fine-tune network parameters to meet diverse QoS requirements.
• Prototype and validate advanced 5G features such as network slicing, MEC and xApp/rApp. Contribute to the development of innovative solutions and algorithms to enhance 5G network capabilities.
• Work closely with the Principal Investigator (PI), Co-PI, faculty and research team to plan, track, and deliver project milestones. Collaborate with industry partners to support real-world trials and joint research initiatives.
• Prepare technical reports and publications. Provide training and guidance to students and other researchers on 5G testbed operation, integration and performance testing.

Job Requirements

• Bachelor’s, master's or Ph.D. in Electrical and Computer Engineering, Computer Science or related field.
• Solid understanding of wireless communications and networking, including 5G systems, open RAN, and network slicing.
• Hands-on experience in deploying, configuring, testing and optimizing 5G systems is preferred.
• Experience in developing xApps and rApps is an advantage.
• Proficiency in Linux system administration, virtualization (Docker/Kubernetes), and scripting (Python, Bash).
• Strong programming skills in Python or C++.
• Excellent analytical, technical, and problem-solving skills.
• Strong communication skills and technical writing for reports and publications.
• Self-motivated, team-oriented, and able to work independently with minimal supervision.

Key Competencies

• Able to build and maintain strong working relationships with people within and external to the university.
• Self-directed learner who believes in continuous learning and development
• Proficient in technical writing and presentation
• Possess strong analytical and critical thinking skills
• Show strong initiative and take ownership of work

Job Description

Be part of an exciting FAB Operations Team working on cutting-edge process technologies.

Job Responsibilities:

• Looking for reliable individual - Operate multiple type of semiconductor equipment in cleanroom environment.
• Ability to use computer-based programs and applications to perform daily work/duties.
• Operate equipment based on the required process specifications (e.g. procedures, change notifications, etc.).
• Participate actively and be responsible in assigned on-the-job assignments and other required trainings when requested. Provide machine operations coverage and backup supports when necessary.
• Adequate understanding of the Equipment in-charge, monitor performance, timely communication with Engineers-in-charge to perform equipment errors recovery promptly when necessary.
• Demonstrate excellent teamwork to promptly execute process sequences and data collections if required.
• Always follow safety protocols & rules in the Clean Room.
• Ensure 6S in the work environment and promptly report hazards/ suspicious/ abnormal activities or personnel if any identified.
• Address potential areas for improvements such as wafers processing cycle time, Equipment utilization, Safety/ Compliances, and cost savings.

Job Requirements:

• Diploma/Degree in MicroElectronics/Electrical/Mechanical/Chemical Engineering or equivalent.
• Understanding on semiconductor process - at least 1-3 years of experience in semiconductor processes (Photolithography, Dry/Wet Etch/Cleans, ThinFilms, Diffusions, Chemical mechanical Polishings, Metrology etc.)
• Must be a self-starter, dependable and highly motivated.
  
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  GMP Technologies (S) Pte Ltd | EA Licence: 11C3793
  EA Personnel: Dianna @ dianna@gmprecruit.com
  Registration No: R1327268
  D-Rec-00083
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  By applying for this role, you consent to GMP Recruitment Services (S) Pte Ltds PDPA and e2is PDPA.
  

Role

As a Deep Learning Engineer, you will apply your strong skills in software engineering, deep learning, 3D computer vision to implement, optimize and deploy the perception capabilities for industrial robots. You will be instrumental in developing advanced AI models for tasks such as transformer based foundation models for object detection, object pose estimation, 3D reconstruction, and grasping. Your work will enable robots to intelligently interact with their environment in real-world industrial settings, translating cutting-edge deep learning research into robust, deployable solutions that make industrial robotics more intelligent and accessible.

How your work moves the mission forward

• Develop and implement robust deep learning models for 3D computer vision tasks, including object detection, object pose estimation, and 3D reconstruction.
• Optimize and deploy algorithms for reliable grasping and manipulation in complex industrial robotics environments.
• Translate advanced deep learning research and models into practical, production-ready solutions for physical robots.
• Enhance robot perception capabilities, enabling more complex and reliable interactions in dynamic manufacturing settings.
• Contribute to the design and implementation of core perception software skills within Intrinsic's platform.

Skills you will need to be successful

• A Master’s or PhD degree in Computer Science, Electrical Engineering, Robotics, or a closely related technical field.
• 1-3 years of experience in AI, machine learning, computer vision, or robotics, with a strong focus on deep learning, including transformer based models.
• Demonstrated experience with deploying deep learning models in production, along with at least one of the following topics: object detection, 6dof pose estimation, or 3D reconstruction.
• Proficiency in at least one modern deep learning framework (e.g., PyTorch, TensorFlow, JAX).
• Strong programming skills in Python and C++.

Skills that will differentiate your candidacy

• Expertise in transformer-based deep learning architectures for computer vision and robotics.
• Experience with optimizing or quantizing ML models for deployment
• Experience developing algorithms for robotic perception, grasping and/or manipulation.
• Proficiency in CUDA for high-performance computing.

Interested applicants are invited to apply directly at the NUS Career Portal. Please note your application will only be processed if you apply via NUS Career Portal.

NUS Career Portal link: https://careers.nus.edu.sg/job/Research-Engineer-%28Digital-Concrete%29/32503-en_GB/

We regret that only shortlisted candidates will be notified.

Job Description

The Department of Civil & Environmental Engineering (CEE) of the National University of Singapore is hiring one Research Engineer (RE) to assist the Principal Investigator in the research area of digital concrete with a focus on the design, printing, testing. 
 

The selected RE is required to work on 
•    Development of durable construction materials from locally available resources for marine applications.
•    Assessment of environmental impact of the developed concrete mixture.
•    Evaluation of the service life of the developed durable concrete mixture. 

Job Requirements

•    Possess a bachelor’s degree in civil engineering or mechanical engineering with demonstrated experience in designing and conducting experiments, statistical data analysis and possess excellent quantitative, and analytical skills. 
•    The ideal candidate is expected to be self-motivated and can work in an interdisciplinary environment.
•    Has the ability to work with minimal supervision, plan and perform experimental and field work, and present results in group meetings.
•    Due to an international working environment, strong written and spoken communications skills will be required. 
•    Prior experience in digital concrete, design, low-carbon concrete is essential to the posted job.  
•    Applications should include (i) a motivation letter, (ii) a detailed Curriculum Vitae, and (iii) contacts of 3 referees. Only shortlisted applicants will be contacted.
•    Open to fixed-term contract

Product area

Google Research is building the next generation of intelligent systems for all Google products. To achieve this, we’re working on projects that utilize the latest computer science techniques developed by skilled software developers and research scientists. Google Research teams collaborate closely with other teams across Google, maintaining the flexibility and versatility required to adapt new projects and foci that meet the demands of the world's fast-paced business needs.

Job description

Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google’s needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.

Additional job description

In this role, you will be advancing fundamental capabilities of AI to drive significant benefits to humanity. You will pioneer AI research in Singapore, focused on delivering the most performant, efficient and capable generative AI models.

Qualifications

Job responsibilities

• Abstract out key problems, design elegant and deep solutions for these problems through theoretical or empirical insights.
• Prototype, profile and benchmark solutions to showcase effectiveness.
• Lead and collaborate with research teams located across the globe.
• Drive and grow collaborations with product teams to land product innovations.
• Collaborate with hardware architects/infrastructure teams to inform design and algorithm decisions.
  

Minimum qualifications

• Bachelor’s degree or equivalent practical experience.
• 1 year of experience with software programming in Python or C++.
• 1 year of experience with data structures and algorithms.
• 1 year of experience implementing core Machine Learning (ML) concepts.

Preferred qualifications

• Master's degree or PhD in Computer Science, or a related technical field.
• Experience in a university or industry labs, with emphasis on AI research.
• Experience developing accessible technologies.
• Understanding of transformer architecture internals.
• One or more AI/ML research publication in peer reviewed research conference.

Job Description

The National Quantum Federated Foundry (NQFF) is seeking a research engineer to join a multidisciplinary team developing essential quantum hardware and device components. The candidate will join our efforts spanning multiple quantum technology platforms ranging from trapped ions to integrated photonics and superconducting devices.

About the role

You will be embedded in a team of research scientists and engineers, contributing hands-on to the development and characterisation of quantum hardware. Based on your strengths and experience, your work will be shaped around one or more of the following focus areas:

• Device Fabrication & Engineering — Perform device fabrication and support the development and optimisation of the processes: this may include cleanroom-based nanofabrication work, electrical assembly (wirebonding, soldering, etc), and prototyping (machining, 3D printing, etc).
• Optical & Photonics Engineering — Perform optical & electrical characterization of photonics devices; construct and maintain optical measurement setups for device testing; data analysis and feedback towards improved device designs.
• Cryogenic Systems & Measurements — Set up, operate, and maintain cryogenic systems (incl. dilution refrigerators, cryostats); integrate and test quantum devices at (down to) millikelvin temperatures; develop automated testing workflows, acquire and analyse experimental data.

What we’re looking for:

• Bachelor’s degree in physics, applied physics, electrical engineering, material science & engineering, mechanical engineering, or a related discipline.
• Hands-on laboratory experience relevant to one or more of the focus areas above
• Familiarity with experimental data acquisition, analysis, and presentation
• Strong communication skills and a collaborative working style

Experience in any of the following would set you apart:

• Optical setups and laser systems
• Electrical/RF electronics and associated test equipment
• Cleanroom nanofabrication
• Mechanical design with CAD software
• Programming (especially in Python) lab equipment for testing automation

About NQFF:

The National Quantum Federated Foundry (NQFF) is a national quantum programme supporting Singapore's quantum R&D ecosystem and industry partners. Functioning as a research foundry, NQFF covers the full device development cycle — from design to fabrication and characterisation — with the goal of translating next-generation quantum devices towards real-world applications.

NQFF is hosted at A*STAR IMRE, with teams operating across A*STAR IME and the National University of Singapore (NUS).

The above eligibility criteria are not exhaustive. A*STAR may include additional selection criteria based on its prevailing recruitment policies. These policies may be amended from time to time without notice. We regret that only shortlisted candidates will be notified.

Established in 2010, the Energy Research Institute @ NTU (ERI@N) is a pan-university research institute that focuses on systems-level research for tropical megacities. It performs translational research that covers the energy value chain from generation to innovative end-use solutions, motivated by industrialisation and deployment. ERI@N has multiple Interdisciplinary Research Programmes which focus on translational Research, Development & Deployment which focus on specific area of the energy value chain, and a number of Living labs and Testbeds which facilitate large scale technology deployment enabling validation and demonstration of real-world applications.

For more details, please view https://www.ntu.edu.sg/erian

The Research Assistant will lead a project on Waste-to-Resource technologies, with primary responsibility for the design, construction, and commissioning of a pilot-scale thermal waste treatment facility. This role contributes directly to the University’s mission of advancing impactful, applied research by developing and demonstrating sustainable waste management solutions that support resource recovery, environmental stewardship, and the transition to a circular economy.

Key Responsibilities:

• Lead technology screening and evaluation to identify suitable thermal treatment processes (e.g. gasification, pyrolysis, combustion) for diverse solid waste streams, including municipal solid waste.

• Contribute to the end-to-end planning, detailed design, installation, commissioning, and operation of a pilot-scale thermochemical waste treatment facility, including hands-on engineering and troubleshooting.

• Work closely with the Principal Investigator (PI) and Co-PIs to develop and implement risk assessments, standard operating procedures (SOPs), and safety protocols, ensuring compliance with applicable regulations for construction and operation of the pilot facility.

• Investigate and evaluate options for energy recovery and electricity generation from the thermal waste treatment process (e.g. syngas utilization, heat recovery systems, gas engine applications).

• Support the identification, characterization, and evaluation of value-added applications for solid residues generated from thermal treatment processes (e.g. biochar, pyrolysis char, ashes), including potential reuse pathways and performance assessment.

Job Requirements:

• Bachelor's in Chemical Engineering, Environmental Engineering or closely related field

• Relevant hands-on experience (academic, pilot-scale, or industrial) in thermal waste treatment, process engineering, or related fields is an advantage

• Familiarity with best practices in waste management and state-of-the art technologies for solid waste treatment

• Strong foundation in thermodynamics, including mass and energy balance calculations and process performance analysis

• Experience or demonstrated ability in designing, building, commissioning, and testing pilot or demonstration-scale systems

• Competence in data and information visualization, including process flow diagrams, technical presentations, and performance reporting

• Ability to work independently and develop practical engineering solutions under tight timelines

• Strong written and oral communication skills, with the ability to convey complex technical concepts clearly

• Ability to collaborate effectively within an international, multidisciplinary team and across different time zones

• Proven ability to build rapport, influence technical and non-technical stakeholders, and work effectively in a fast-paced environment

We regret to inform that only shortlisted candidates will be notified.

Interested applicants are invited to apply directly at the NUS Career Portal. Please note your application will only be processed if you apply via NUS Career Portal.

NUS Career Portal link: https://careers.nus.edu.sg/job/Research-Engineer-%28Gen-AI%29/32622-en_GB/

We regret that only shortlisted candidates will be notified.

Job Description

We are looking for a Research Engineer for the OUTSMART Corp Lab led by Professor Massimo Alioto, at the Department of Electrical and Computer Engineering, National University of Singapore (NUS).

The selected candidate is expected to:

•    circuit exploration of near-PCM and in-memory SRAM computing macros, and related models  
•    experimental validation of computing and memory macros and their support of similarity/confidence-based computation skipping, and dataflow adaptation 
•    experimental validation of test structures with dataflow adaptation in single chip, high memory-logic interspersion
•    experimental validation of chiplet interfaces and synchronization, test structures with final memory-logic aggregation, and dataflow adaptation across chiplets 
•    experimental validation of final testchip in single- and many-chiplet arrangement
•    experimental validation of final testchip in single-chiplet arrangement 

The appointment can commence immediately with a 1-year contract, with prospect of extension. Salary will be commensurate with qualifications and experience.

Qualifications

The candidate must possess:
•    Minimally a Bachelor’s degree in either Electrical Engineering or strictly related (e.g., Computer, Electronics, Communication, or Information Engineering).
•    Knowledge on circuit architectures, transistor-level design.
•    Knowledge on silicon chip design, EDA tools.
•    Ability to work independently and collaboratively in a team environment.
•    Good communication and interpersonal skills.
•    open to fixed term contract.

Interested applicants are invited to apply directly at the NUS Career Portal. Please note your application will only be processed if you apply via NUS Career Portal.

NUS Career Portal link: https://careers.nus.edu.sg/job/Research-Engineer-%28Gen-AI%29/32620-en_GB/

We regret that only shortlisted candidates will be notified.

Job Description

We are looking for a Research Engineer for the OUTSMART Corp Lab led by Professor Massimo Alioto, at the Department of Electrical and Computer Engineering, National University of Singapore (NUS).

The selected candidate is expected to:

•    circuit exploration of near-PCM and in-memory SRAM computing macros, and related models  
•    experimental validation of computing and memory macros and their support of similarity/confidence-based computation skipping, and dataflow adaptation 
•    experimental validation of test structures with dataflow adaptation in single chip, high memory-logic interspersion
•    experimental validation of chiplet interfaces and synchronization, test structures with final memory-logic aggregation, and dataflow adaptation across chiplets 
•    experimental validation of final testchip in single- and many-chiplet arrangement
•    experimental validation of final testchip in single-chiplet arrangement 

The appointment can commence immediately with a 1-year contract, with prospect of extension. Salary will be commensurate with qualifications and experience.

Qualifications

The candidate must possess:
•    Minimally a Bachelor’s degree in either Electrical Engineering or strictly related (e.g., Computer, Electronics, Communication, or Information Engineering).
•    Knowledge on circuit architectures, transistor-level design.
•    Knowledge on silicon chip design, EDA tools.
•    Ability to work independently and collaboratively in a team environment.
•    Good communication and interpersonal skills.
•    open to fixed term contract.

Interested applicants are invited to apply directly at the NUS Career Portal. Please note your application will only be processed if you apply via NUS Career Portal.

NUS Career Portal link: https://careers.nus.edu.sg/job/Research-Engineer-%28Gen-AI%29/32618-en_GB/

We regret that only shortlisted candidates will be notified.

Job Description

We are looking for a Research Engineer for the OUTSMART Corp Lab led by Professor Massimo Alioto, at the Department of Electrical and Computer Engineering, National University of Singapore (NUS).

The selected candidate is expected to:

•    circuit exploration of near-PCM and in-memory SRAM computing macros, and related models  
•    experimental validation of computing and memory macros and their support of similarity/confidence-based computation skipping, and dataflow adaptation 
•    experimental validation of test structures with dataflow adaptation in single chip, high memory-logic interspersion
•    experimental validation of chiplet interfaces and synchronization, test structures with final memory-logic aggregation, and dataflow adaptation across chiplets 
•    experimental validation of final testchip in single- and many-chiplet arrangement
•    experimental validation of final testchip in single-chiplet arrangement 

The appointment can commence immediately with a 1-year contract, with prospect of extension. Salary will be commensurate with qualifications and experience.

Qualifications

The candidate must possess:
•    Minimally a Bachelor’s degree in either Electrical Engineering or strictly related (e.g., Computer, Electronics, Communication, or Information Engineering).
•    Knowledge on circuit architectures, transistor-level design.
•    Knowledge on silicon chip design, EDA tools.
•    Ability to work independently and collaboratively in a team environment.
•    Good communication and interpersonal skills.
•    open to fixed term contract.

Interested applicants are invited to apply directly at the NUS Career Portal. Please note your application will only be processed if you apply via NUS Career Portal.

NUS Career Portal link: https://careers.nus.edu.sg/job/Research-Engineer-%28Gen-AI%29/32616-en_GB/

We regret that only shortlisted candidates will be notified.

Job Description

We are looking for a Research Engineer for the OUTSMART Corp Lab led by Professor Massimo Alioto, at the Department of Electrical and Computer Engineering, National University of Singapore (NUS).

The selected candidate is expected to:

•    circuit exploration of near-PCM and in-memory SRAM computing macros, and related models  
•    experimental validation of computing and memory macros and their support of similarity/confidence-based computation skipping, and dataflow adaptation 
•    experimental validation of test structures with dataflow adaptation in single chip, high memory-logic interspersion
•    experimental validation of chiplet interfaces and synchronization, test structures with final memory-logic aggregation, and dataflow adaptation across chiplets 
•    experimental validation of final testchip in single- and many-chiplet arrangement
•    experimental validation of final testchip in single-chiplet arrangement 

The appointment can commence immediately with a 1-year contract, with prospect of extension. Salary will be commensurate with qualifications and experience.

Qualifications

The candidate must possess:
•    Minimally a Bachelor’s degree in either Electrical Engineering or strictly related (e.g., Computer, Electronics, Communication, or Information Engineering).
•    Knowledge on circuit architectures, transistor-level design.
•    Knowledge on silicon chip design, EDA tools.
•    Ability to work independently and collaboratively in a team environment.
•    Good communication and interpersonal skills.
•    open to fixed term contract.

Interested applicants are invited to apply directly at the NUS Career Portal. Please note your application will only be processed if you apply via NUS Career Portal.

NUS Career Portal link: https://careers.nus.edu.sg/job/Research-Engineer-%28Gen-AI%29/32621-en_GB/

We regret that only shortlisted candidates will be notified.

Job Description

We are looking for a Research Engineer for the OUTSMART Corp Lab led by Professor Massimo Alioto, at the Department of Electrical and Computer Engineering, National University of Singapore (NUS).

The selected candidate is expected to:

•    circuit exploration of near-PCM and in-memory SRAM computing macros, and related models  
•    experimental validation of computing and memory macros and their support of similarity/confidence-based computation skipping, and dataflow adaptation 
•    experimental validation of test structures with dataflow adaptation in single chip, high memory-logic interspersion
•    experimental validation of chiplet interfaces and synchronization, test structures with final memory-logic aggregation, and dataflow adaptation across chiplets 
•    experimental validation of final testchip in single- and many-chiplet arrangement
•    experimental validation of final testchip in single-chiplet arrangement 

The appointment can commence immediately with a 1-year contract, with prospect of extension. Salary will be commensurate with qualifications and experience.

Qualifications

The candidate must possess:
•    Minimally a Bachelor’s degree in either Electrical Engineering or strictly related (e.g., Computer, Electronics, Communication, or Information Engineering).
•    Knowledge on circuit architectures, transistor-level design.
•    Knowledge on silicon chip design, EDA tools.
•    Ability to work independently and collaboratively in a team environment.
•    Good communication and interpersonal skills.
•    open to fixed term contract.

Interested applicants are invited to apply directly at the NUS Career Portal. Please note your application will only be processed if you apply via NUS Career Portal.

NUS Career Portal link: https://careers.nus.edu.sg/job/Research-Engineer-%28Gen-AI%29/32619-en_GB/

We regret that only shortlisted candidates will be notified.

Job Description

We are looking for a Research Engineer for the OUTSMART Corp Lab led by Professor Massimo Alioto, at the Department of Electrical and Computer Engineering, National University of Singapore (NUS).

The selected candidate is expected to:

•    circuit exploration of near-PCM and in-memory SRAM computing macros, and related models  
•    experimental validation of computing and memory macros and their support of similarity/confidence-based computation skipping, and dataflow adaptation 
•    experimental validation of test structures with dataflow adaptation in single chip, high memory-logic interspersion
•    experimental validation of chiplet interfaces and synchronization, test structures with final memory-logic aggregation, and dataflow adaptation across chiplets 
•    experimental validation of final testchip in single- and many-chiplet arrangement
•    experimental validation of final testchip in single-chiplet arrangement 

The appointment can commence immediately with a 1-year contract, with prospect of extension. Salary will be commensurate with qualifications and experience.

Qualifications

The candidate must possess:
•    Minimally a Bachelor’s degree in either Electrical Engineering or strictly related (e.g., Computer, Electronics, Communication, or Information Engineering).
•    Knowledge on circuit architectures, transistor-level design.
•    Knowledge on silicon chip design, EDA tools.
•    Ability to work independently and collaboratively in a team environment.
•    Good communication and interpersonal skills.
•    open to fixed term contract.

R&D Specialist 

Location: Tuas, Company Transport / Transport Allowance $120 if candidate possess own vehicle to work

Basic: $5000 to $5500

Working hours: Monday to Friday (8am to 5pm)

Requirements

• Ph.D in Chemistry or Chemical Engineering with more than 5 years of experiences in the area of specialty chemical manufacturing/applications, oil & gas or water treatment industry.

Responsibilities

• Develop, evaluate, and optimize treatment and handling processes for existing, new, and unknown waste streams, ensuring technical feasibility and cost-effectiveness.
• Design and implement resource recovery processes from waste streams to enhance sustainability and value creation.
• Work closely with Sales, Marketing, and Operations teams to understand waste sources, identify treatment and recovery opportunities, support commercialization, and execute pilot trials.
• Identify, assess, and implement new technologies and processes, including collaboration with external partners (universities, research institutes, and technology providers).
• Establish and continuously improve laboratory capabilities, including process development and analytical methods to support R&D activities.
• Drive continuous improvement of existing operations through process optimization and introduction of alternative treatment methods.
• Ensure compliance with internal procedures, documentation standards, and all safety, health, and environmental requirements; maintain proper laboratory housekeeping.
• Support evaluation and development of handling procedures for high-risk and high-value waste streams.
• Contribute to new business development, including identifying opportunities, supporting new projects, and participating in facility planning and operations.
• Stay updated on industry trends and emerging technologies and proactively introduce relevant innovations into the company.

Interested applicants kindly submit your resume through here and allow our Consultant to match you with our Clients. No Charges will be incurred by Candidates for any service rendered.

Tan Yu Jing Reg No: R26161199

The Supreme HR Advisory Pte Ltd EA No: 14C7279