Total 45 process development engineer job vacancies in The Philippines

We are seeking a Security Firmware Engineer to design, implement, and maintain security‑critical components in embedded firmware for next‑generation storage and controller products. This role focuses on device‑level security, including secure firmware update, lifecycle management, debug port control, Root of Trust (RoT) interactions, and protection of critical assets such as keys, OTP, and credentials.

The ideal candidate has strong low‑level firmware expertise combined with hands‑on experience in embedded security architectures and secure system design.

Key Responsibilities

Security Firmware Architecture & Development

• Design and implement security layers within device firmware, aligned with product security requirements and ASIC security IP capabilities
• Integrate firmware with Root of Trust (RoT) subsystems, including support for both hardware‑based and firmware‑based RoT models where applicable. 
• Ensure secure handling of cryptographic material and prevention of unauthorized access.
• Implement and integrate cryptographic primitives and related authentication and encryption flows used in firmware
• Work closely with hardware teams to leverage ASIC security IPs, HSMs, and secure key storage.
• Support security testing, threat analysis, and vulnerability mitigation during development and validation cycles.
• Participate in design reviews, security assessments, and risk evaluations.

We are looking for a Front‑End PCIe Firmware Engineer to design, develop, and maintain the device‑side PCIe Front‑End firmware stack for next‑generation high‑performance storage controllers. In this role, you will own key layers of the PCIe firmware responsible for link bring‑up, configuration space management, MMIO, interrupts, DMA, and command/queue handling, working closely with hardware, validation, and host‑software teams.

Key Responsibilities

• PCIe Front‑End Firmware Development

  • Design and implement firmware for PCIe initialization, link bring‑up, and configuration space programming (BARs, capabilities, MSI/MSI‑X).
  • Develop MMIO‑based control and status interfaces used by host software.
  • Work closely with DMA engines to enable high‑bandwidth, low‑latency host‑to‑device and device‑to‑host data transfers. 

• Architecture & Cross‑Functional Collaboration

  • Collaborate with hardware design teams on PCIe IP integration and bring‑up.
  • Partner with validation teams on FPGA, emulation, and ASIC debug.
  • Work with host‑side driver and system software teams to define clean, scalable interfaces. 

• Debugging & Performance Optimization

  • Debug complex system‑level issues spanning firmware, hardware, and host.
  • Profile and optimize PCIe throughput, latency, and interrupt efficiency.
  • Support bring‑up on pre‑silicon and post‑silicon platforms.

About the position:

As a Staff firmware verification engineer, you will be part of firmware verification team that design and develop white box and grey box tests in Python to verify SSD firmware designs for each firmware feature. This position is specifically to focus on verification and validation of SSD firmware features. You will be working closely with product architects and firmware engineers to create a comprehensive firmware verification test for SSD features. In this role, you will be contributing to test strategy, test development, integrating the tests using various development platforms, deploying it on firmware verification lab for regression runs and perform failure analysis. The role focuses on defining and executing robust firmware verification strategies for PCIe, MMIO, DMA, and custom host–device protocols across both pre‑silicon and post‑silicon environments.

Responsibilities:

• Collaborate closely with firmware engineers & architects on product architecture and designs to define the comprehensive verification plan to validate each SSD features
• Design, Develop and Integrate the white box and gray box tests on SSD products in roadmap
• Conduct test plan reviews and code reviews to ensure the tests are scalable and meeting the requirements
• Participate in driving failure analysis and collaborate with integration/execution engineers for test deployment.
• Validate designs against PCI Express Base Specification (up to Gen5/Gen6), ensuring compliance with electrical, logical, and transaction-layer requirements.
• Define and own firmware validation strategy for PCIe front-end subsystems, including MMIO address spaces, BARs, resets, interrupts, and error handling.
• Define, plan, and execute system-level validation strategies for PCIe front-end (PHY + controller) IP and SoC-level integration.
• Integrate tests into scalable automation frameworks supporting simulation, emulation, and silicon validation.
• Debug firmware issues, perform front-end error injection, and expose design or integration defects.
• Validate PCIe compliance, MMIO access integrity, and robustness of fault detection and recovery mechanisms.
• Review and verify firmware trace logs and debug telemetry for correctness and completeness.
• Drive validation readiness across pre‑silicon and post‑silicon platforms, ensuring alignment of firmware specs, drivers, and test collateral.
• Interface with cross‑functional stakeholders to ensure validation coverage meets product and customer requirements.
• Drive compliance and interoperability testing with various endpoint/root-complex devices, switches, and add-in cards.

• We are seeking a Staff Engineer, who understand embedded NAND system design and firmware algorithms in order to create a test validation plans and implement them in modern object oriented languages.
• Work closely with the system architects and the firmware team to develop Validation plans, test bench and test cases
• Develop an overall validation strategy including defining validation infrastructure and validation methodology
• Debug the firmware and expose design issues
• Define and design functional tests required to meet customer needs
• Review SanDisk UFS/eMMC embedded NAND validation requirements and influence future SanDisk product design for debug and test
• Work with customers to understand field bugs and to enhance the validation coverage
• Interface with all key stakeholders to ensure product validation meets customer expectations and needs

Role Summary:

We are seeking a Software Engineer to contribute to the development of AI/ML software for our AI Privacy Box platform. This role involves implementing and optimizing LLM and RAG workflows, with a focus on efficient use of storage and system resources.

Key Responsibilities:

• Develop AI/ML software components for the AI Privacy Box platform.
• Implement and integrate LLM and RAG models into the software stack.
• Work on performance optimization of AI workloads using storage and system‑level techniques.
• Contribute to system software components interacting with OS, memory, and I/O subsystems.
• Collaborate with senior engineers on architecture, design, and optimization.
• Debug, test, and maintain high‑quality, production‑ready code.

Required Skills:

• Knowledge of Machine Learning and AI/ML fundamentals.
• Exposure to LLMs and RAG concepts or frameworks.
• Proficiency in C and/or C++.
• Understanding of Operating Systems concepts.
• Strong knowledge of Data Structures and Algorithms.

Role Summary:

We are seeking a Software Engineer to contribute to the development of AI/ML software for our AI Privacy Box platform. This role involves implementing and optimizing LLM and RAG workflows, with a focus on efficient use of storage and system resources.

Key Responsibilities:

• Develop AI/ML software components for the AI Privacy Box platform.
• Implement and integrate LLM and RAG models into the software stack.
• Work on performance optimization of AI workloads using storage and system‑level techniques.
• Contribute to system software components interacting with OS, memory, and I/O subsystems.
• Collaborate with senior engineers on architecture, design, and optimization.
• Debug, test, and maintain high‑quality, production‑ready code.

Required Skills:

• Knowledge of Machine Learning and AI/ML fundamentals.
• Exposure to LLMs and RAG concepts or frameworks.
• Proficiency in C and/or C++.
• Understanding of Operating Systems concepts.
• Strong knowledge of Data Structures and Algorithms.

Job Description: 

• Should be good in understanding the PCB board’s w.r.t layout schematics and information about the various active and passive components on the PCB.
• Good hands on BOM analysis and report preparation.
• Excellent debugging and Failure Analysis skills with exposure to tools like protocol analysers, Logical analysers, CRO etc. Should be good at reproducing and root causing the issues.
• Good Power analysis and Power tree Distribution Reverse engineering skills
• Good to have Experience in Storage Domain.
• Good to have Knowledge on the PCB Construction and Assembly details
• Good Experience in System level activities for hardware design and validation.
• Good to have Experience working with Flash memory technologies and internals.
• Good to have Experience in NVMe, SD/uSD, USB or PCIE protocols understanding.
• Mindset towards delivering the Highest Quality product to the customer.
• Must be execution focused, have zeal to learn more and do more. Take initiatives.
• Proven ability to achieve results in a fast moving, dynamic environment.
• Should be good team player, approachable with to do attitude.

Job Description: 

• Should be good in understanding the PCB board’s w.r.t layout schematics and information about the various active and passive components on the PCB.
• Good hands on BOM analysis and report preparation.
• Excellent debugging and Failure Analysis skills with exposure to tools like protocol analysers, Logical analysers, CRO etc. Should be good at reproducing and root causing the issues.
• Good Power analysis and Power tree Distribution Reverse engineering skills
• Good to have Experience in Storage Domain.
• Good to have Knowledge on the PCB Construction and Assembly details
• Good Experience in System level activities for hardware design and validation.
• Good to have Experience working with Flash memory technologies and internals.
• Good to have Experience in NVMe, SD/uSD, USB or PCIE protocols understanding.
• Mindset towards delivering the Highest Quality product to the customer.
• Must be execution focused, have zeal to learn more and do more. Take initiatives.
• Proven ability to achieve results in a fast moving, dynamic environment.
• Should be good team player, approachable with to do attitude.

Experience in ASIC verification, Expertise in System Verilog and UVM, Verilog.

·        Experience in IP level verification, testbench architecture development, Testbench component developments. Expertise in coverage closer, code coverage, functional coverage Experience in Gate level simulations.

·        The candidate should be able to define verification plan, create testbenches, testcases,gate level simulations etc independently.

·        Knowledge on serial protocols UFS, PCIe, USB, MIPI or any other serial protocol. Knowledge on memory protocols - AXI, PCIE, UFS and Flash etc.

·        Knowledge on scripting languages like Python, Perl etc.

·        Keen on continuous process improvement to improve Quality and time

The SoC Development team is seeking highly motivated engineers to join a team of experienced engineers working on the development of controller SoCs.

As a Verification Engineer in SoC Development Team, you will develop test-plans and tests for use in testing complex hardware in System On Chip (SoC) ASIC’s.  Your work will enable industry-leading data storage control SoC’s that get deployed into high volume consumer and enterprise products.

The growing diversity of data creates an exponential number of new possibilities – for the world, our company and you. You’ll be part of a team driving the innovations necessary to outpace new demands and challenges everywhere data lives, from sensors to mobile devices to the cloud. We’ve only started to scratch the surface of what data can do. You can help unlock its full potential.

ESSENTIAL DUTIES AND RESPONSIBILITIES:

• Responsible for driving verification strategy, creating Test Plans, and developing Test Benches for SoC.
• Collaborate with architects, designers,  pre-and post-silicon verification teams to develop test plans
• Responsible to develop C-based tests on SoC. Processor knowledge is a plus.
• Define and meet all functional coverage goals
• Run and debug gate-level simulations 
• Understanding and generation of functional patterns for ATE

SoC Verification Engineer

The SoC Development team at Sandisk is seeking highly motivated SoC Verification Engineers to join our talented team, working on cutting-edge controller development for high-performance SoCs used in industry-leading products.

Role & Responsibilities:

As a SoC Verification Engineer, you will play a key role in ensuring the quality and reliability of our SoC designs. You will be responsible for:

• Developing verification test plans based on design specifications.
• Creating and executing test cases across multiple platforms, including RTL simulation, FPGA prototyping, and Palladium emulation.
• Verification test structures (DFx Verification)
• Performing Gate-Level Simulations (GLS) and debugging complex SoC designs.
• Collaborating with design, architecture, and firmware teams to define verification strategies and drive coverage-driven verification methodologies.
• Contributing to the development of advanced verification environments, including UVM, PSS testbenches.
• Analyzing functional coverage and simulation results to enhance verification efficiency and effectiveness.
• Genrating Fucntional patterns required for Wafer Sorting. 

Why Join Us?

At Sandisk, you’ll be part of a team of highly skilled engineers solving complex verification challenges and driving innovations in data storage solutions. Your work will directly impact the performance and reliability of high-volume new age data solutions, consumer and enterprise products.

Together, we’ll push the boundaries of technology, unlock the full potential of data, and shape the future of storage solutions.

The SoC Development team is seeking highly motivated engineers to join a team of experienced engineers working on the development of advanced controller SoCs.

As a Technologist Verification Engineer in the SoC Development Team, you will be responsible for planning, architecting, and executing verification strategies to validate complex hardware in System-on-Chip (SoC) ASICs. Your work will enable industry-leading data storage control SoCs deployed into high-volume consumer and enterprise products.

The growing diversity of data creates an exponential number of new possibilities – for the world, our company, and you. You’ll be part of a team driving the innovations necessary to outpace new demands and challenges everywhere data lives, from sensors to mobile devices to the cloud. We’ve only started to scratch the surface of what data can do. You can help unlock its full potential.

Essential Duties and Responsibilities

• Ownership: End-to-end ownership of one or more subsystems or SoC verification flows, including planning, execution, and closure
• Mentorship: Experience mentoring junior and mid-level engineers, reviewing their test plans, code, and coverage.
• Define verification strategy, create detailed test plans, and develop robust test benches for SoC verification.
• Collaborate with architects, RTL designers, and pre- and post-silicon verification teams to ensure end-to-end verification coverage.
• Develop and run UVM/SystemVerilog-based verification environments.
• Write, run, and debug C-based tests on SoCs; processor and embedded software knowledge is a must.
• Define and achieve functional and code coverage goals; track and close coverage gaps.
• Run, debug, and sign off gate-level simulations with SDF annotation.
• Develop and validate functional patterns for ATE (Automatic Test Equipment).
• Debug complex issues across multiple domains (digital logic, firmware, timing, DFT).
• Participate in IP and subsystem-level integration verification and ensure smooth transition to SoC-level verification.
• Support low-power verification using UPF and ensure power intent validation.
• Automate regression setup, execution, and result analysis using scripting languages (Python, Perl, TCL, etc.).
• Contribute to verification methodology improvements, reusable environments, and verification infrastructure scalability.
• Work closely with validation and bring-up teams to ensure test portability from pre-silicon to post-silicon.

As a SoC Validation/Verification Engineer, you will play a key role in ensuring the quality and reliability of our SoC designs. You will be responsible for:

• Understanding complex ASIC specifications to create comprehensive Verification/Validation plans for both pre- and post-silicon validation.
• Independently developing and executing tests for verification and validation.
• Collaborating with cross-functional teams to drive closure of verification and validation activities.
• Signing off on verification and validation deliverables.
• Debugging and root cause analysis of issues found during validation.
• Developing and maintaining automated test environments and regression suites.
• Contributing to the continuous improvement of verification methodologies and best practices.

Your work will enable industry-leading data storage control SoCs that are deployed in high-volume consumer and enterprise products.

Why Join Us?

At SanDisk, you’ll be part of a team of highly skilled engineers solving complex verification challenges and driving innovation in data storage solutions. Your work will directly impact the performance and reliability of next-generation data solutions for both consumer and enterprise markets.

Together, we’ll push the boundaries of technology, unlock the full potential of data, and shape the future of storage solutions.

• Responsible for understanding the eMMC and UFS specification, and design compliance, functional, stress, error injection and cross functional test cases
• Responsible for understanding the Firmware Design, architecture and coming up with test cases
• Communicating the Requirements in a precise manner
• Developing test scripts and executing them on Hardware
• Debugging the failures coming from Regression
• Articulate the issue to the stake holders
• Ability to understand, debug the Firmware/Simulator code

About the position:

As a Staff Engineer, you will be part of the Firmware Verification Team that design and develop white box and grey box tests in Python to verify firmware designs of Storage systems for AI workloads. You will be working closely with product architects and firmware engineers to create a comprehensive firmware verification test. In this role, you will be working with a high energy team, contributing to test strategy, test development, integrating the tests using various development platforms, and perform failure analysis. This role demands strong hands-on experience with understanding of NAND architecture design, data path validation, handling of NAND level errors, and firmware/hardware debugging across multiple platforms (pre-silicon, emulation, silicon bring-up)

Key Responsibilities

• Collaborate closely with firmware engineers & architects on product architecture and designs to define the comprehensive verification plan to deliver a high quality product to customers on time
• Design, Develop and Integrate the white box and gray box tests on SSD products in roadmap inline with latest methodologies
• Conduct test plan reviews and code reviews to ensure the tests are scalable and meeting the requirements
• Participate in driving failure analysis and collaborate with integration/execution engineers for test deployment.
• Work with memory (NAND ) systems team, to understand the implementation of algorithms handling IO paths, behavior of NAND when single bit or double bit level error occurs, correction mechanisms, etc
• Work with firmware engineers, understand the logs/events to triage and debug test failures
• Use SanDisk proprietary tools and open-source test frameworks to run, monitor, and triage test suites