Total 467 test engineer job vacancies in Art / Design / Entertainment category in The Philippines

Responsibility

1. Responsible for the physical design of advanced process digital ASIC/AI/CPU chips, layout design of analog/digital chips, PPAC optimization under advanced processes, fully custom design, and exploration of new technologies in advanced packaging.

2. Multiple tasks including but not limited to: back-end physical implementation from gate-level netlist to GDSII, layout design of digital/analog chips, including PR, PV, IR signoff, PPAC optimization, and STA/Spice signoff.

Requirement

1. Recent graduates or those who graduated within the past year with a bachelor's degree or higher in fields including but not limited to Mathematics, Physics, Electronic Science and Technology, Microelectronics, Information and Communication Engineering, Computer Science and Technology, or Materials Science and Engineering.

2. Excellent academic performance, with a strong curiosity, learning ability, and knowledge transfer capability in new areas and related professional fields.

3. Understanding of the IC development process, with a certain theoretical foundation in digital circuits, practical skills, and innovation ability.

Solar Design Engineer

Job Summary

We are seeking a detail-oriented and motivated Solar Design Engineer to join our newly setup renewable energy team to design and optimize solar photovoltaic (PV) systems for commercial and industrial projects, ensuring high performance, compliance, and cost efficiency to support sustainable energy solutions.

Responsibilities

• Design and develop solar PV system layouts for rooftop and ground-mounted projects to maximize energy yield
• Perform system sizing, energy yield analysis, and electrical design calculations to ensure optimal system performance
• Prepare technical drawings using AutoCAD, SketchUp, and PV design tools for accurate project documentation
• Conduct shading analysis and optimize panel placement to enhance system efficiency
• Coordinate with project, procurement, and construction teams to ensure design feasibility and smooth project execution
• Review technical specifications, single-line diagrams (SLD), and electrical schematics to verify design accuracy
• Ensure compliance with local regulations, utility requirements, and safety standards to meet legal and safety obligations
• Support proposal and tender submissions by preparing detailed technical documentation
• Conduct site visits and assist in troubleshooting design-related issues to maintain project quality and timelines

Preferred competencies and qualifications

• Diploma or Degree in Electrical Engineering, Renewable Energy, or related field
• Experience in solar PV design for Singapore projects
• Proficiency in AutoCAD and PV design software such as PVsyst, SketchUp, and Helioscope
• Strong understanding of electrical systems, PV components, and Singapore regulatory requirements
• Ability to read and interpret technical drawings and electrical diagrams
• Good analytical, problem-solving, and communication skills
• Team player with a proactive and responsible attitude
• Must be able to work full-time at project site

THE ROLE:

We are looking for an experienced Verification Engineer to join our team for cutting-edge server memory products. This individual will be responsible for driving the verification efforts of DDR interfaces, including advanced memory protocols such as DFI, DDR5, and LPDDR5/LPDDR6, across a range of DIMMs (Dual In-line Memory Modules). The ideal candidate will possess advanced knowledge of SystemVerilog, UVM, C/C++, and scripting languages like Python/Perl.

THE PERSON:

You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc.  You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you.

KEY RESPONSIBILITIES:

• Work with a team verification engineers in the development and execution of verification plan for DDR5, LPDDR5, and DFI memory systems in server products.
• Comprehend the PHY's interaction in the complete system which includes HW (Silicon), FW, BIOS & SW and ensure that FW, BIOS & SW are aligned to enable all features of the memory interface.
• Understand RTL and micro-architecture sufficiently to engage in cross functional discussions with IP/Domain architects and Design engineers for planning and debug.
• Knowledge sharing and other contributions to verification methodology
• Support Post-Si teams for Product Performance, Power and functional issues debug/resolution 

PREFERRED EXPERIENCE:

• Developed and implemented SystemVerilog and UVM (Universal Verification Methodology) based testbenches, simulation environments, and functional coverage models for DDR5 and LPDDR5 systems.
• Worked closely with hardware, firmware, and software teams to align on system-level memory architecture, identify potential integration issues, and define validation requirements early in the design phase.
• Built VIPs and BFMs for memory interfaces from scratch (preferrable)
• GLS, NLP, XPROP simulation experience is preferable
• Strong proficiency in system verilog assertions, constraints and coverage.
• Worked in formal verification methods, with proven record of tool usage beyond the standard apps.
• Excellent communication, management, and presentation skills. 

ACADEMIC CREDENTIALS:

• Bachelor’s or Master’s degree in related discipline

Company Overview

Ambiq's mission is to develop the lowest-power semiconductor solutions to enable intelligent devices everywhere by developing the lowest-power semiconductor solutions to drive a more energy-efficient, sustainable, and data-driven world. Ambiq has helped leading manufacturers worldwide develop products that last weeks on a single charge (rather than days) while delivering a maximum feature set in compact industrial designs. Ambiq's goal is to take Artificial Intelligence (AI) where it has never gone before in mobile and portable devices, using Ambiq's advanced ultra-low power system on chip (SoC) solutions. Ambiq has shipped more than 230 million units as of October 2023. For more information, visit www.ambiq.com.

Our innovative and fast-moving teams of research, development, production, marketing, sales, and operations are spread across several continents, including the US (Austin and San Jose), Taiwan (Hsinchu), China (Shenzhen and Shanghai), Japan (Tokyo), and Singapore. We value continued technology innovation, fanatical attention to customer needs, collaborative decision-making, and enthusiasm for energy efficiency. We embrace candidates who also share these same values. The successful candidate must be self-motivated, creative, and comfortable learning and driving exciting new technologies. We encourage and nurture an environment for growth and opportunities to work on complex, engaging, and challenging projects that will create a lasting impact. Join us on our quest for 100 billion devices. The endpoint intelligence revolution starts here.

Responsibilities

You will be responsible for verifying digital and mixed-signal designs, including systems-on-chip with multiple CPUs, digital signal processors, security hardware, and other logic for IoT applications.

Specific responsibilities include:

• The right candidate will be a self-starter who assumes full ownership of DV tasks and delivers high-quality results.
• Develop test plans at block, sub-system, and chip level.
• Execute SoC-based verification at full-chip.
• Write C-based lib packages and tests.
• Architect and implement scalable and reusable test benches using SystemVerilog and UVM.
• Develop comprehensive test cases, stimulus generation, and checkers to achieve high coverage.
• Automating the test environment for randomized testing and scoreboarding.
• Utilize advanced debugging techniques to identify and resolve design and verification issues.
• Perform root-cause analysis and work with design teams to fix identified issues
• Define and track functional and code coverage metrics to ensure thorough verification.
• Ensure that verification quality meets or exceeds industry standards and project requirements.
• Edge-based AI inference is preferred.

Requirements

• BSEE /MSEE Degree with 7 - 10 years of experience in block, sub-system, and full-chip verification
• Should have delivered multiple chips functioning to Specification.
• Identify and manage verification deliverables, milestones, and schedules.
• Proactively identify potential verification risks and develop mitigation strategies.
• Collaborate with design, architecture, and software teams to understand and verify design intent.
• Communicate verification progress, issues, and results to stakeholders and management.
• Strong in understanding multiple architectures, integrating 3rd party IPs/VIPs, and working with mixed-signal designs with low-power design and verification challenges
• Strong understanding/exposure to Design Verification for low-power battery-operated designs is highly desired.
• C-based verification in an SoC environment is required
• Experience with ARM processor-based designs and low-power design techniques is a plus.
• Languages: SystemVerilog (UVM), Verilog, C/C++, Python, Perl or Makefile
• Technologies: ARM M/RISC-V (Preferred), AMBA AXI/AHB/APS, DMA, Flow Control, Serial Devices, Qo5
• Preferred technologies: MIPI(CSI/DSI), Crypto, OTP, DSP, Low-Power

Responsibility

1. Responsible for algorithms and logic design and verification related to ASIC/AI/CPU chips under advanced processes.

2. Responsible for chip testability design and related work.

3. Responsible for maintaining the IC development environment and tool processes for chips, as well as designing In-House EDA tools.

Requirement

1. Recent graduates or those who graduated within the past year with a bachelor's degree or higher in fields including but not limited to Mathematics, Physics, Electronic Science and Technology, Microelectronics, Information and Communication Engineering, Computer Science and Technology, or Materials Science and Engineering.

2. Excellent academic performance, with a strong curiosity, learning ability, and knowledge transfer capability in new areas and related professional fields.

3. Understanding of the IC development process, with a certain theoretical foundation in digital circuits, practical skills, and innovation ability.

THE ROLE:

AMD is seeking a talented, motivated and self-driven digital design engineer to be part of the SerDes Technology group. You will be part of the team developing SerDes/Transceiver designs and solutions. The role involves work on all aspects of the FPGA/ASIC digital design flow including architectural specification, test planning, RTL design, functional verification, through synthesis and implementation to hardware and post silicon validation.

THE PERSON:

The successful candidate will execute digital design work and contribute technically with a high general impact on the overall design. We are seeking a team player who is innovative, highly accurate and detail-oriented, willing to learn, and possessing excellent communication and problem-solving skills to join our design team.

KEY RESPONSIBILITIES:

• Design and development with leading edge technology nodes on digital logic blocks.
• DFT implementation and verification.
• Perform test bench development and functional verification of developed digital logic blocks.
• Perform post silicon validation, testing and debug of block functionality on prototype silicon.
• Work closely with system architect, project manager, design and verification teams to develop design specifications documents, verification plans, and validation test plans.

PREFERRED EXPERIENCE:

• Experience in ASIC or digital IC design, with hands‑on involvement in RTL development (Verilog/SystemVerilog) for complex digital blocks or subsystems.
• Exposure to the front‑end digital design flow, including RTL coding, functional verification, lint/CDC checks, logic synthesis, and timing analysis.
• Experience contributing to one or more ASIC or FPGA tapeouts, either at block or subsystem level.
• Familiarity with DFT concepts and flows; hands‑on experience is a plus but not mandatory.
• Exposure to post‑silicon validation, testing, or debug, with an interest in understanding silicon behaviour and root‑cause analysis.
• Background in high‑performance or high‑speed digital designs (e.g., SoC interconnects, memory interfaces, I/O subsystems, data‑path logic) is advantageous.
• Knowledge of SystemVerilog and UVM is a plus.
• Strong problem‑solving skills, willingness to learn new domains (e.g., SerDes/transceiver logic), and ability to collaborate effectively with cross‑functional teams.

ACADEMIC CREDENTIALS:

• Bachelor or Masters Degree in Electronic Engineering.

LOCATION:

Singapore

THE ROLE:

AMD is seeking a talented, motivated and self-driven digital design engineer to be part of the SerDes Technology group. You will be part of the team developing SerDes/Transceiver designs and solutions. The role involves work on all aspects of the FPGA/ASIC digital design flow including architectural specification, test planning, RTL design, functional verification, through synthesis and implementation to hardware and post silicon validation.

THE PERSON:

The successful candidate will execute digital design work and contribute technically with a high general impact on the overall design. We are seeking a team player who is innovative, highly accurate and detail-oriented, willing to learn, and possessing excellent communication and problem-solving skills to join our design team.

KEY RESPONSIBILITIES:

• Design and development with leading edge technology nodes on digital logic blocks.
• DFT implementation and verification.
• Perform test bench development and functional verification of developed digital logic blocks.
• Perform post silicon validation, testing and debug of block functionality on prototype silicon.
• Work closely with system architect, project manager, design and verification teams to develop design specifications documents, verification plans, and validation test plans.

PREFERRED EXPERIENCE:

• Experience in ASIC or digital IC design, with hands‑on involvement in RTL development (Verilog/SystemVerilog) for complex digital blocks or subsystems.
• Exposure to the front‑end digital design flow, including RTL coding, functional verification, lint/CDC checks, logic synthesis, and timing analysis.
• Experience contributing to one or more ASIC or FPGA tapeouts, either at block or subsystem level.
• Familiarity with DFT concepts and flows; hands‑on experience is a plus but not mandatory.
• Exposure to post‑silicon validation, testing, or debug, with an interest in understanding silicon behaviour and root‑cause analysis.
• Background in high‑performance or high‑speed digital designs (e.g., SoC interconnects, memory interfaces, I/O subsystems, data‑path logic) is advantageous.
• Knowledge of SystemVerilog and UVM is a plus.
• Strong problem‑solving skills, willingness to learn new domains (e.g., SerDes/transceiver logic), and ability to collaborate effectively with cross‑functional teams.

ACADEMIC CREDENTIALS:

• Bachelor or Masters Degree in Electronic Engineering.

LOCATION:

Singapore

Responsibilities:

• Develop, document, and support the fabrication of high-precision plastic injection tooling and molded components for manufacturing.
• Assist the Program team during new project quotations by providing accurate DFM (Design for Manufacturing) analysis to ensure tooling and product meet quality standards.
• Collaborate with customers on DFM and mold concept reviews, addressing technical requirements and concerns.
• Support the Tooling Department by conducting internal tooling design and DFM reviews prior to tool launch.
• Assist Production in molding process optimization, implementing manufacturing fixtures and automation to enhance reliability and efficiency.
• Support the Quality Team in designing and fabricating test and measurement fixtures.
• Coordinate mold trials, troubleshoot tooling and molded parts, and implement engineering changes to ensure smooth production with required quality standards.

Qualifications:

• Strong technical and analytical skills with a keen interest in problem-solving.
• Self-motivated team player with excellent interpersonal and communication skills.
• Experience or knowledge in engineering design, manufacturing processes, or tooling is an advantage.
• Proficient in 3D CAD or other engineering design software.

We regret only shortlisted candidates will be contacted. All applications will be handled confidentially. By submitting your application, you agree to the collection, use, retention, and disclosure of your personal information to prospective employers.

Wecruit Pte Ltd

EA License No: 20C0270

EA Personnel: Nyon Hock Sen (Aden)

EA Personnel Reg No: R24124070

Responsibilities

• Responsible for algorithms and logic design and verification related to ASIC/AI/CPU chips under advanced processes
• Responsible for chip testability design and related work
• Responsible for maintaining the IC development environment and tool processes for chips, as well as designing In-House EDA tools

▌ Requirements

• Bachelor's degree or higher in fields including but not limited to Mathematics, Physics, Electronic Science and Technology, Microelectronics, Information and Communication Engineering, Computer Science and Technology, or Materials Science and Engineering
• Understanding of the IC development process, with a certain theoretical foundation in digital circuits, practical skills, and innovation ability

Regret to inform that only shortlisted candidates will be notified.
www.dadaconsultants.com
EA Registration Number: R1878287
Business Registration Number: 201735941W.

About the Company

Ranked among the Top 300 Employers in the Singapore Opportunity Index (SOI) 2025, AcePLP is a Singapore-based digital construction company powering the Architecture, Engineering, and Construction (AEC) industry through Building Information Modelling (BIM).

Through BIM, we help projects navigate complexity —improving coordination, reducing rework, enhancing safety, and enabling more predictable project delivery in one of the world’s most demanding urban environments. BIM professionals play an increasingly critical role in shaping how our city is designed and delivered.

As digital construction grows, skilled BIM professionals are in high demand. As career launchers and career builders, AcePLP invest in our people through structured training, real project exposure, and clear progression pathways — building the next generation of digital construction specialists.

Roles & Responsibilities

AcePLP is a Singapore-based leader in Building Information Modelling (BIM) services for the Architecture, Engineering, and Construction (AEC) industries. We deliver high-quality BIM solutions across project lifecycles and help clients digitize and manage construction and facility data.

We are committed to developing talent at every stage of their career:

• Entry-level professionals gain practical, industry-ready skills through hands-on training.

• Experienced professionals can follow structured pathways to grow their expertise and advance their careers.

26-Month Structured BIM Apprenticeship Programme
Join our apprenticeship programme to become an Accredited BIM Professional in Singapore’s high-demand Digital Delivery industry:

• Free two-month intensive technical training in BIM and CAD.

• On-the-job experience across commercial, educational, industrial, and healthcare projects.

• Guidance from experienced Trainers and Resource Managers.

• Build expertise, expand your professional network, and earn recognition for further studies (SUSS [Bachelor of Building and Project Management] and NUS [Bachelor of Technology in Engineering] programmes).

• Sponsorship opportunities for further studies may be available (terms apply).

Duties and Responsibilities:

Reporting to the client’s assigned supervisor and Resource Manager, you will:

• Learn and demonstrate proficiency in construction codes, BIM tools, and workflow processes.

• Undertake BIM modelling and CAD drafting across various project types.

• Develop BIM models, shop drawings, as-built drawings, and submission documentation.

• Review work for completeness and accuracy.

• Perform ad-hoc duties as assigned.

Who Should Apply:

• Entry-level or mid-career professionals passionate about the Built Environment sector.

• Relevant educational backgrounds: Architecture, Mechanical, Electrical, Civil, Structural Engineering, Construction/Project Management, Green Building & Sustainability, Facilities Management, or related engineering/design fields.

• Professionals with prior BIM experience may fast-track their development through a skills test.

At AcePLP, we don’t just offer jobs—we provide a verified pathway to a high-demand career in Singapore’s Digital Delivery industry.

Apply here: https://aces.aceplp.com.sg/apply/?cg

Job Description:

• Support the technical team and construction team for all design matters.
• Review all technical documentation and drawings of the Project works.
• Work closely with consultant on the scope of services, design and project deliverables to enhance site efficiency and constructability.
• Manage design approval process and coordination with the clients, consultants and subcontractors in a timely manner to resolve all technical issues.
• Ensure strict compliance of the design in accordance with contractual requirements.
• Identifies and highlight to management and project team of any potential risks or issues that will impact project performance.
• Support tender team and prepare technical tender documents as per specifications for bidding of civil and structural engineering projects as when assigned.

Job Requirement:

• PE Board Recognised Degree in Civil Engineering.
• Minimum 1 year of design management experience with at least 2 year of design experience in consultant firm.
• Strong coordination and collaboration with other disciplines.
• Good interpersonal and communication skills .
• Good organization and time management skills.

Our clients are seeking a Design Engineer to drive innovation in process plant design. This role offers the opportunity to lead piping and structural layouts, ensure compliance with ASME standards, and deliver optimized, value-engineered solutions. You’ll collaborate closely with clients and project teams, translating technical expertise into practical, high impact designs.

Key Responsibilities

• Design and optimize piping layouts, facility layouts, and structural designs

• Prepare and review piping material specifications for compliance with industry standards

• Coordinate and validate static and dynamic pipe stress analyses

• Generate and review piping, support, isometric, and steel structure drawings

• Provide value engineering proposals during tenders and projects

• Liaise with clients and project managers to clarify requirements and ensure alignment

• Oversee site works to confirm adherence to design drawings and calculations

• Prepare as-built drawings and calculations for submission

Key Requirements

• Degree in Mechanical, Electrical, or Piping/Plumbing Engineering (MEP-related discipline)

• Several years of experience in the design and engineering of process plants preferred

• Strong sketching ability and clear communication skills for team collaboration

• Proficiency in MS Office and AutoCAD; knowledge of Plant3D, Revit, and Advanced Steel is advantageous

• Highly motivated, proactive, and adaptable to new challenges

• Strong analytical problem-solving skills and time management abilities

• Experience coordinating structural drawings and clarifying client requirements

Benefits & Perks

• AWS + Variable bonus

• Transport + Mobile allowance

• Medical & Dental benefit

• Annual leave + Birthday leave

• Career progression opportunity

**We regret that only shortlisted candidates will be notified.

Your Profile will be kept in our database for more career opportunities.

We wish you all the best in your job search.

EA personnel: Ong Ping Tiong

EA personnel Reg No: R25127323

EA License No: 24C2562

Our Client:

Construction Engineering (Sub-contractor)

6 days, Mon-Sat

Central Region (beside MRT)

UP $4,500 + VB!

Job Responsibilities:

• Lead ACMV project execution by interpreting specifications, drawings, and client requirements

• Perform technical calculations (e.g., ACMV performance, ventilation, pressurization) to ensure optimal system design

• Coordinate installations across multiple trades to ensure smooth project integration

• Support testing, commissioning, documentation, and variation submissions to ensure successful delivery
  

Job Requirements:

• Relevant qualification in Mechanical Engineering (ITE/Diploma/Degree or equivalent)

• At least 1-2 years of experience in managing ACMV projects in industrial or commercial settings

• Strong communication and interpersonal skills for effective coordination with good problem-solving and project management abilities with a team-oriented mindset
  

For interested applicants, please click "Quick Apply”

We regret to inform that only shortlisted candidates would be notified.

By submitting your personal data and/or resume, you will be deemed to have agreed and consented to us collecting, using, retaining, and disclosing your personal information to prospective employers for their consideration.

Yvette Jerramie Galang Manalo | EA Reg No: R1659970

JTE Recruit Pte Ltd | EA Lic No: 14C7215

THE ROLE: 

We are looking for an adaptive, self-motivative Design Verification (DV) engineer to join our growing PLL team. As a key contributor, you will be part of a leading team that drives and improves AMD's ability to deliver the highest quality, industry-leading technologies to the market. The Design Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. 

THE PERSON:

• Excellent analytical and critical thinking skills along with attention to details
• Must be an initiative-taker, able to drive tasks independently and efficiently to completion
• Strong/effective communication skills
• Enthusiastic team-first mentality
• Ability to provide mentorship and guidance to junior engineers

KEY RESPONSIBILITIES:

• Analyze complex verification and digital design problems and propose verification / micro-architecture solutions

• Develop RTL and Firmware validation.

• Drive/develop ASIC verification flows and scripts.

• Create Verification architecture.

• Work with the RTL Design team to ensure functional correctness and coverage.
• Support silicon bring-up and diagnostics.

• Support Post-silicon debug, root cause bug, provide solution or workaround.

PREFERRED EXPERIENCE:

• Proven experience in design verification from specification to successful silicon.
• Experience in PLL, high-speed interfaces such as DDR, PCIe and high-speed SERDES.
• Experience in designs with multiple power domains.
• Experience in designs with multiple clock domains.
• Experience in behavior modeling for Analog Circuits.
• Experience in industry-standard ASIC CAD tools for verification, simulation, synthesis, STA, CDC, UPF, power estimation, etc
• Progressive experience in RTL Design

ACADEMIC CREDENTIALS:

• Bachelors or Masters Degree in Computer Engineering/Electrical Engineering 

About:

This role will focus on design coordination, shop drawing management, and technical documentation, working closely with both design and site teams.

Responsibilities:

• Coordinate design activities with Construction Teams, QP(D), QPS, Client, and subcontractors’ PEs
• Prepare and review shop drawings for both temporary and permanent works; obtain necessary approvals from QP(D) and Client
• Lead and manage the production and submission of design packages, ensuring quality and timely delivery
• Review and perform design calculations for temporary works and ad-hoc engineering requirements, with PE endorsement where required
• Collaborate with site teams on temporary works schemes, ensuring constructability, compliance, and alignment with site conditions
• Monitor site developments, identify design changes, and raise requests to designers when necessary
• Optimise engineering solutions to improve safety, cost-efficiency, and constructability, including maximising reuse of temporary works
• Resolve technical issues, provide engineering insights, and escalate critical matters to the Design Manager
• Support the Design Manager on ad-hoc technical and design matters

Requirements:

• Degree in Civil Engineering recognised by the Professional Engineers Board (PEB), Singapore
• Minimum 5 years of relevant experience in the construction industry; underground project experience preferred
• Strong knowledge of local codes, standards, and safety regulations
• Good analytical, communication, and stakeholder management skills
• Able to work on-site at Changi East

Interested candidates please apply online or send your latest CV to alex.fong@AlwaysHired.com.sg

AlwaysHired Pte Ltd

Reg No: R1549345

EA: 24C2293

We regret to inform that only shortlisted candidates will be notified. Please note that your response to this advertisement will constitute informed consent to the collection, use, and/or disclosure of personal data by AlwaysHired, its affiliates and, where necessary, to relevant third parties, for purposes such as job application processing, career advisory, research, and other administrative purposes, in compliance with the relevant provisions of the Privacy Policy available at www.alwayshired.com.sg/privacy-policy