Memory Design Automation – Memory Compiler (Technical Manager)
5 days ago
Job Description:Responsible for cutting edge technology node’s SRAM compiler design and deliver best quality of design kit.Seamlessly collaborate with.....
Job Description:
- Responsible for cutting edge technology node’s SRAM compiler design and deliver best quality of design kit.
- Seamlessly collaborate with SRAM design and layout team to achieve highest quality of design kit delivery.
- Responsible for data analysis and platform development of memory usage big data.
- Responsible for physical verification (DRC/ERC/LVS/ANT/PERC) on SRAM compiler.
- Responsible for spice simulation on timing, power and noise on SRAM compiler.
- Responsible for QA check and development on SRAM compiler.
Requirements:
- Bachelor or Master Degree in Electrical and Electronic Engineering or Computer Engineering or Computer Science.
- Multi-task capability and strong self-driven characteristics to meet challenging schedule.
- Proficient with Perl, Shell, Python, C/C++ languages, knowledge with AI machine learning algorithm and infrastructure is an added advantage.
- Strong interpersonal skills to work with team members with multi-cultural environment
- Knowledge of high performance, low power SRAM/ROM and VLSI design is an added advantage. Experience with EDA tools will be helpful.
- Candidate with experience is preferable.
Interested candidates may apply through the application system. We regret that only shortlisted candidates will be notified.
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